crypto: hisilicon - unify initial value assignment into QM
Some initial value assignment of struct hisi_qm could put into QM. Signed-off-by: Weili Qian <qianweili@huawei.com> Signed-off-by: Shukun Tan <tanshukun1@huawei.com> Reviewed-by: Zhou Wang <wangzhou1@hisilicon.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
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@ -672,12 +672,13 @@ static int hpre_qm_init(struct hisi_qm *qm, struct pci_dev *pdev)
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qm->ver = rev_id;
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qm->sqe_size = HPRE_SQE_SIZE;
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qm->dev_name = hpre_name;
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qm->fun_type = (pdev->device == HPRE_PCI_DEVICE_ID) ?
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QM_HW_PF : QM_HW_VF;
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if (pdev->is_physfn) {
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qm->fun_type = (pdev->device == HPRE_PCI_DEVICE_ID) ?
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QM_HW_PF : QM_HW_VF;
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if (qm->fun_type == QM_HW_PF) {
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qm->qp_base = HPRE_PF_DEF_Q_BASE;
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qm->qp_num = pf_q_num;
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qm->qm_list = &hpre_devices;
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}
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return hisi_qm_init(qm);
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@ -748,7 +749,6 @@ static int hpre_pf_probe_init(struct hpre *hpre)
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if (ret)
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return ret;
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qm->qm_list = &hpre_devices;
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qm->err_ini = &hpre_err_ini;
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hisi_qm_dev_err_init(qm);
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@ -758,15 +758,15 @@ static int hpre_pf_probe_init(struct hpre *hpre)
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static int hpre_probe_init(struct hpre *hpre)
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{
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struct hisi_qm *qm = &hpre->qm;
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int ret = -ENODEV;
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int ret;
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if (qm->fun_type == QM_HW_PF)
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if (qm->fun_type == QM_HW_PF) {
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ret = hpre_pf_probe_init(hpre);
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else if (qm->fun_type == QM_HW_VF && qm->ver == QM_HW_V2)
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/* v2 starts to support get vft by mailbox */
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ret = hisi_qm_get_vft(qm, &qm->qp_base, &qm->qp_num);
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if (ret)
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return ret;
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}
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return ret;
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return 0;
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}
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static int hpre_probe(struct pci_dev *pdev, const struct pci_device_id *id)
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@ -779,8 +779,6 @@ static int hpre_probe(struct pci_dev *pdev, const struct pci_device_id *id)
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if (!hpre)
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return -ENOMEM;
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pci_set_drvdata(pdev, hpre);
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qm = &hpre->qm;
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ret = hpre_qm_init(qm, pdev);
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if (ret) {
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@ -1916,6 +1916,27 @@ int hisi_qm_get_free_qp_num(struct hisi_qm *qm)
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}
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EXPORT_SYMBOL_GPL(hisi_qm_get_free_qp_num);
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static void hisi_qm_pre_init(struct hisi_qm *qm)
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{
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struct pci_dev *pdev = qm->pdev;
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switch (qm->ver) {
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case QM_HW_V1:
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qm->ops = &qm_hw_ops_v1;
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break;
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case QM_HW_V2:
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qm->ops = &qm_hw_ops_v2;
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break;
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default:
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return;
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}
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pci_set_drvdata(pdev, qm);
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mutex_init(&qm->mailbox_lock);
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init_rwsem(&qm->qps_lock);
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qm->qp_in_used = 0;
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}
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/**
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* hisi_qm_init() - Initialize configures about qm.
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* @qm: The qm needing init.
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@ -1929,16 +1950,7 @@ int hisi_qm_init(struct hisi_qm *qm)
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unsigned int num_vec;
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int ret;
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switch (qm->ver) {
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case QM_HW_V1:
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qm->ops = &qm_hw_ops_v1;
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break;
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case QM_HW_V2:
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qm->ops = &qm_hw_ops_v2;
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break;
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default:
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return -EINVAL;
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}
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hisi_qm_pre_init(qm);
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ret = qm_alloc_uacce(qm);
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if (ret < 0)
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@ -1984,15 +1996,21 @@ int hisi_qm_init(struct hisi_qm *qm)
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if (ret)
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goto err_free_irq_vectors;
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qm->qp_in_used = 0;
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mutex_init(&qm->mailbox_lock);
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init_rwsem(&qm->qps_lock);
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if (qm->fun_type == QM_HW_VF && qm->ver == QM_HW_V2) {
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/* v2 starts to support get vft by mailbox */
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ret = hisi_qm_get_vft(qm, &qm->qp_base, &qm->qp_num);
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if (ret)
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goto err_irq_unregister;
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}
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INIT_WORK(&qm->work, qm_work_process);
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atomic_set(&qm->status.flags, QM_INIT);
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return 0;
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err_irq_unregister:
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qm_irq_unregister(qm);
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err_free_irq_vectors:
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pci_free_irq_vectors(pdev);
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err_iounmap:
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@ -722,6 +722,7 @@ static int sec_pf_probe_init(struct sec_dev *sec)
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static int sec_qm_init(struct hisi_qm *qm, struct pci_dev *pdev)
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{
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enum qm_hw_ver rev_id;
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int ret;
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rev_id = hisi_qm_get_hw_version(pdev);
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if (rev_id == QM_HW_UNKNOWN)
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@ -729,9 +730,9 @@ static int sec_qm_init(struct hisi_qm *qm, struct pci_dev *pdev)
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qm->pdev = pdev;
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qm->ver = rev_id;
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qm->sqe_size = SEC_SQE_SIZE;
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qm->dev_name = sec_name;
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qm->fun_type = (pdev->device == SEC_PF_PCI_DEVICE_ID) ?
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QM_HW_PF : QM_HW_VF;
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if (qm->fun_type == QM_HW_PF) {
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@ -750,7 +751,25 @@ static int sec_qm_init(struct hisi_qm *qm, struct pci_dev *pdev)
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qm->qp_num = SEC_QUEUE_NUM_V1 - SEC_PF_DEF_Q_NUM;
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}
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return hisi_qm_init(qm);
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/*
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* WQ_HIGHPRI: SEC request must be low delayed,
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* so need a high priority workqueue.
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* WQ_UNBOUND: SEC task is likely with long
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* running CPU intensive workloads.
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*/
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qm->wq = alloc_workqueue("%s", WQ_HIGHPRI | WQ_MEM_RECLAIM |
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WQ_UNBOUND, num_online_cpus(),
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pci_name(qm->pdev));
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if (!qm->wq) {
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pci_err(qm->pdev, "fail to alloc workqueue\n");
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return -ENOMEM;
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}
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ret = hisi_qm_init(qm);
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if (ret)
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destroy_workqueue(qm->wq);
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return ret;
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}
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static void sec_qm_uninit(struct hisi_qm *qm)
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@ -763,29 +782,10 @@ static int sec_probe_init(struct sec_dev *sec)
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struct hisi_qm *qm = &sec->qm;
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int ret;
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/*
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* WQ_HIGHPRI: SEC request must be low delayed,
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* so need a high priority workqueue.
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* WQ_UNBOUND: SEC task is likely with long
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* running CPU intensive workloads.
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*/
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qm->wq = alloc_workqueue("%s", WQ_HIGHPRI |
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WQ_MEM_RECLAIM | WQ_UNBOUND, num_online_cpus(),
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pci_name(qm->pdev));
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if (!qm->wq) {
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pci_err(qm->pdev, "fail to alloc workqueue\n");
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return -ENOMEM;
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}
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if (qm->fun_type == QM_HW_PF)
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if (qm->fun_type == QM_HW_PF) {
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ret = sec_pf_probe_init(sec);
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else if (qm->fun_type == QM_HW_VF && qm->ver == QM_HW_V2)
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/* v2 starts to support get vft by mailbox */
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ret = hisi_qm_get_vft(qm, &qm->qp_base, &qm->qp_num);
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if (ret) {
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destroy_workqueue(qm->wq);
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return ret;
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if (ret)
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return ret;
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}
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return 0;
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@ -825,8 +825,6 @@ static int sec_probe(struct pci_dev *pdev, const struct pci_device_id *id)
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if (!sec)
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return -ENOMEM;
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pci_set_drvdata(pdev, sec);
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qm = &sec->qm;
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ret = sec_qm_init(qm, pdev);
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if (ret) {
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@ -694,12 +694,27 @@ static int hisi_zip_qm_init(struct hisi_qm *qm, struct pci_dev *pdev)
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qm->pdev = pdev;
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qm->ver = rev_id;
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qm->algs = "zlib\ngzip";
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qm->sqe_size = HZIP_SQE_SIZE;
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qm->dev_name = hisi_zip_name;
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qm->fun_type = (pdev->device == PCI_DEVICE_ID_ZIP_PF) ?
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QM_HW_PF : QM_HW_VF;
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if (qm->fun_type == QM_HW_PF) {
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qm->qp_base = HZIP_PF_DEF_Q_BASE;
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qm->qp_num = pf_q_num;
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qm->qm_list = &zip_devices;
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} else if (qm->fun_type == QM_HW_VF && qm->ver == QM_HW_V1) {
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/*
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* have no way to get qm configure in VM in v1 hardware,
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* so currently force PF to uses HZIP_PF_DEF_Q_NUM, and force
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* to trigger only one VF in v1 hardware.
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*
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* v2 hardware has no such problem.
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*/
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qm->qp_base = HZIP_PF_DEF_Q_NUM;
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qm->qp_num = HZIP_QUEUE_NUM_V1 - HZIP_PF_DEF_Q_NUM;
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}
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return hisi_qm_init(qm);
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}
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@ -713,24 +728,6 @@ static int hisi_zip_probe_init(struct hisi_zip *hisi_zip)
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ret = hisi_zip_pf_probe_init(hisi_zip);
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if (ret)
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return ret;
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qm->qp_base = HZIP_PF_DEF_Q_BASE;
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qm->qp_num = pf_q_num;
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qm->qm_list = &zip_devices;
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} else if (qm->fun_type == QM_HW_VF) {
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/*
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* have no way to get qm configure in VM in v1 hardware,
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* so currently force PF to uses HZIP_PF_DEF_Q_NUM, and force
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* to trigger only one VF in v1 hardware.
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*
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* v2 hardware has no such problem.
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*/
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if (qm->ver == QM_HW_V1) {
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qm->qp_base = HZIP_PF_DEF_Q_NUM;
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qm->qp_num = HZIP_QUEUE_NUM_V1 - HZIP_PF_DEF_Q_NUM;
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} else if (qm->ver == QM_HW_V2)
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/* v2 starts to support get vft by mailbox */
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return hisi_qm_get_vft(qm, &qm->qp_base, &qm->qp_num);
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}
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return 0;
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@ -746,8 +743,6 @@ static int hisi_zip_probe(struct pci_dev *pdev, const struct pci_device_id *id)
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if (!hisi_zip)
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return -ENOMEM;
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pci_set_drvdata(pdev, hisi_zip);
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qm = &hisi_zip->qm;
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ret = hisi_zip_qm_init(qm, pdev);
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