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drm/nouveau/instmem: switch to instanced constructor 

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Reviewed-by: Lyude Paul <lyude@redhat.com>
This commit is contained in:
Ben Skeggs 2020-12-04 12:20:41 +10:00
parent 4dea1a9609
commit d9691a2245
11 changed files with 104 additions and 108 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

2
drivers/gpu/drm/nouveau/include/nvkm/core/device.h
View File

@ -60,7 +60,6 @@ struct nvkm_device {
struct notifier_block nb;
} acpi;
struct nvkm_instmem *imem;
struct nvkm_ltc *ltc;
struct nvkm_mc *mc;
struct nvkm_mmu *mmu;
@ -134,7 +133,6 @@ struct nvkm_device_chip {
#include <core/layout.h>
#undef NVKM_LAYOUT_INST
#undef NVKM_LAYOUT_ONCE
int (*imem )(struct nvkm_device *, int idx, struct nvkm_instmem **);
int (*ltc )(struct nvkm_device *, int idx, struct nvkm_ltc **);
int (*mc )(struct nvkm_device *, int idx, struct nvkm_mc **);
int (*mmu )(struct nvkm_device *, int idx, struct nvkm_mmu **);

1
drivers/gpu/drm/nouveau/include/nvkm/core/layout.h
View File

@ -6,6 +6,7 @@ NVKM_LAYOUT_ONCE(NVKM_SUBDEV_GPIO , struct nvkm_gpio , gpio)
NVKM_LAYOUT_ONCE(NVKM_SUBDEV_I2C , struct nvkm_i2c , i2c)
NVKM_LAYOUT_ONCE(NVKM_SUBDEV_FUSE , struct nvkm_fuse , fuse)
NVKM_LAYOUT_ONCE(NVKM_SUBDEV_BUS , struct nvkm_bus , bus)
NVKM_LAYOUT_ONCE(NVKM_SUBDEV_INSTMEM , struct nvkm_instmem , imem)
NVKM_LAYOUT_ONCE(NVKM_SUBDEV_FB , struct nvkm_fb , fb)
NVKM_LAYOUT_ONCE(NVKM_SUBDEV_BAR , struct nvkm_bar , bar)
NVKM_LAYOUT_ONCE(NVKM_SUBDEV_FAULT , struct nvkm_fault , fault)

8
drivers/gpu/drm/nouveau/include/nvkm/subdev/instmem.h
View File

@ -30,8 +30,8 @@ int nvkm_instobj_new(struct nvkm_instmem *, u32 size, u32 align, bool zero,
struct nvkm_memory **);
int nv04_instmem_new(struct nvkm_device *, int, struct nvkm_instmem **);
int nv40_instmem_new(struct nvkm_device *, int, struct nvkm_instmem **);
int nv50_instmem_new(struct nvkm_device *, int, struct nvkm_instmem **);
int gk20a_instmem_new(struct nvkm_device *, int, struct nvkm_instmem **);
int nv04_instmem_new(struct nvkm_device *, enum nvkm_subdev_type, int, struct nvkm_instmem **);
int nv40_instmem_new(struct nvkm_device *, enum nvkm_subdev_type, int, struct nvkm_instmem **);
int nv50_instmem_new(struct nvkm_device *, enum nvkm_subdev_type, int, struct nvkm_instmem **);
int gk20a_instmem_new(struct nvkm_device *, enum nvkm_subdev_type, int, struct nvkm_instmem **);
#endif

1
drivers/gpu/drm/nouveau/nvkm/core/subdev.c
View File

@ -33,7 +33,6 @@ nvkm_subdev_type[NVKM_SUBDEV_NR] = {
#include <core/layout.h>
#undef NVKM_LAYOUT_ONCE
#undef NVKM_LAYOUT_INST
[NVKM_SUBDEV_INSTMEM ] = "imem",
[NVKM_SUBDEV_LTC ] = "ltc",
[NVKM_SUBDEV_MC ] = "mc",
[NVKM_SUBDEV_MMU ] = "mmu",

175
drivers/gpu/drm/nouveau/nvkm/engine/device/base.c
View File

@ -83,7 +83,7 @@ nv4_chipset = {
.devinit = { 0x00000001, nv04_devinit_new },
.fb = { 0x00000001, nv04_fb_new },
.i2c = { 0x00000001, nv04_i2c_new },
.imem = nv04_instmem_new,
.imem = { 0x00000001, nv04_instmem_new },
.mc = nv04_mc_new,
.mmu = nv04_mmu_new,
.pci = nv04_pci_new,
@ -104,7 +104,7 @@ nv5_chipset = {
.devinit = { 0x00000001, nv05_devinit_new },
.fb = { 0x00000001, nv04_fb_new },
.i2c = { 0x00000001, nv04_i2c_new },
.imem = nv04_instmem_new,
.imem = { 0x00000001, nv04_instmem_new },
.mc = nv04_mc_new,
.mmu = nv04_mmu_new,
.pci = nv04_pci_new,
@ -126,7 +126,7 @@ nv10_chipset = {
.fb = { 0x00000001, nv10_fb_new },
.gpio = { 0x00000001, nv10_gpio_new },
.i2c = { 0x00000001, nv04_i2c_new },
.imem = nv04_instmem_new,
.imem = { 0x00000001, nv04_instmem_new },
.mc = nv04_mc_new,
.mmu = nv04_mmu_new,
.pci = nv04_pci_new,
@ -146,7 +146,7 @@ nv11_chipset = {
.fb = { 0x00000001, nv10_fb_new },
.gpio = { 0x00000001, nv10_gpio_new },
.i2c = { 0x00000001, nv04_i2c_new },
.imem = nv04_instmem_new,
.imem = { 0x00000001, nv04_instmem_new },
.mc = nv11_mc_new,
.mmu = nv04_mmu_new,
.pci = nv04_pci_new,
@ -168,7 +168,7 @@ nv15_chipset = {
.fb = { 0x00000001, nv10_fb_new },
.gpio = { 0x00000001, nv10_gpio_new },
.i2c = { 0x00000001, nv04_i2c_new },
.imem = nv04_instmem_new,
.imem = { 0x00000001, nv04_instmem_new },
.mc = nv04_mc_new,
.mmu = nv04_mmu_new,
.pci = nv04_pci_new,
@ -190,7 +190,7 @@ nv17_chipset = {
.fb = { 0x00000001, nv10_fb_new },
.gpio = { 0x00000001, nv10_gpio_new },
.i2c = { 0x00000001, nv04_i2c_new },
.imem = nv04_instmem_new,
.imem = { 0x00000001, nv04_instmem_new },
.mc = nv17_mc_new,
.mmu = nv04_mmu_new,
.pci = nv04_pci_new,
@ -212,7 +212,7 @@ nv18_chipset = {
.fb = { 0x00000001, nv10_fb_new },
.gpio = { 0x00000001, nv10_gpio_new },
.i2c = { 0x00000001, nv04_i2c_new },
.imem = nv04_instmem_new,
.imem = { 0x00000001, nv04_instmem_new },
.mc = nv17_mc_new,
.mmu = nv04_mmu_new,
.pci = nv04_pci_new,
@ -234,7 +234,7 @@ nv1a_chipset = {
.fb = { 0x00000001, nv1a_fb_new },
.gpio = { 0x00000001, nv10_gpio_new },
.i2c = { 0x00000001, nv04_i2c_new },
.imem = nv04_instmem_new,
.imem = { 0x00000001, nv04_instmem_new },
.mc = nv04_mc_new,
.mmu = nv04_mmu_new,
.pci = nv04_pci_new,
@ -256,7 +256,7 @@ nv1f_chipset = {
.fb = { 0x00000001, nv1a_fb_new },
.gpio = { 0x00000001, nv10_gpio_new },
.i2c = { 0x00000001, nv04_i2c_new },
.imem = nv04_instmem_new,
.imem = { 0x00000001, nv04_instmem_new },
.mc = nv17_mc_new,
.mmu = nv04_mmu_new,
.pci = nv04_pci_new,
@ -278,7 +278,7 @@ nv20_chipset = {
.fb = { 0x00000001, nv20_fb_new },
.gpio = { 0x00000001, nv10_gpio_new },
.i2c = { 0x00000001, nv04_i2c_new },
.imem = nv04_instmem_new,
.imem = { 0x00000001, nv04_instmem_new },
.mc = nv17_mc_new,
.mmu = nv04_mmu_new,
.pci = nv04_pci_new,
@ -300,7 +300,7 @@ nv25_chipset = {
.fb = { 0x00000001, nv25_fb_new },
.gpio = { 0x00000001, nv10_gpio_new },
.i2c = { 0x00000001, nv04_i2c_new },
.imem = nv04_instmem_new,
.imem = { 0x00000001, nv04_instmem_new },
.mc = nv17_mc_new,
.mmu = nv04_mmu_new,
.pci = nv04_pci_new,
@ -322,7 +322,7 @@ nv28_chipset = {
.fb = { 0x00000001, nv25_fb_new },
.gpio = { 0x00000001, nv10_gpio_new },
.i2c = { 0x00000001, nv04_i2c_new },
.imem = nv04_instmem_new,
.imem = { 0x00000001, nv04_instmem_new },
.mc = nv17_mc_new,
.mmu = nv04_mmu_new,
.pci = nv04_pci_new,
@ -344,7 +344,7 @@ nv2a_chipset = {
.fb = { 0x00000001, nv25_fb_new },
.gpio = { 0x00000001, nv10_gpio_new },
.i2c = { 0x00000001, nv04_i2c_new },
.imem = nv04_instmem_new,
.imem = { 0x00000001, nv04_instmem_new },
.mc = nv17_mc_new,
.mmu = nv04_mmu_new,
.pci = nv04_pci_new,
@ -366,7 +366,7 @@ nv30_chipset = {
.fb = { 0x00000001, nv30_fb_new },
.gpio = { 0x00000001, nv10_gpio_new },
.i2c = { 0x00000001, nv04_i2c_new },
.imem = nv04_instmem_new,
.imem = { 0x00000001, nv04_instmem_new },
.mc = nv17_mc_new,
.mmu = nv04_mmu_new,
.pci = nv04_pci_new,
@ -388,7 +388,7 @@ nv31_chipset = {
.fb = { 0x00000001, nv30_fb_new },
.gpio = { 0x00000001, nv10_gpio_new },
.i2c = { 0x00000001, nv04_i2c_new },
.imem = nv04_instmem_new,
.imem = { 0x00000001, nv04_instmem_new },
.mc = nv17_mc_new,
.mmu = nv04_mmu_new,
.pci = nv04_pci_new,
@ -411,7 +411,7 @@ nv34_chipset = {
.fb = { 0x00000001, nv10_fb_new },
.gpio = { 0x00000001, nv10_gpio_new },
.i2c = { 0x00000001, nv04_i2c_new },
.imem = nv04_instmem_new,
.imem = { 0x00000001, nv04_instmem_new },
.mc = nv17_mc_new,
.mmu = nv04_mmu_new,
.pci = nv04_pci_new,
@ -434,7 +434,7 @@ nv35_chipset = {
.fb = { 0x00000001, nv35_fb_new },
.gpio = { 0x00000001, nv10_gpio_new },
.i2c = { 0x00000001, nv04_i2c_new },
.imem = nv04_instmem_new,
.imem = { 0x00000001, nv04_instmem_new },
.mc = nv17_mc_new,
.mmu = nv04_mmu_new,
.pci = nv04_pci_new,
@ -456,7 +456,7 @@ nv36_chipset = {
.fb = { 0x00000001, nv36_fb_new },
.gpio = { 0x00000001, nv10_gpio_new },
.i2c = { 0x00000001, nv04_i2c_new },
.imem = nv04_instmem_new,
.imem = { 0x00000001, nv04_instmem_new },
.mc = nv17_mc_new,
.mmu = nv04_mmu_new,
.pci = nv04_pci_new,
@ -479,7 +479,7 @@ nv40_chipset = {
.fb = { 0x00000001, nv40_fb_new },
.gpio = { 0x00000001, nv10_gpio_new },
.i2c = { 0x00000001, nv04_i2c_new },
.imem = nv40_instmem_new,
.imem = { 0x00000001, nv40_instmem_new },
.mc = nv17_mc_new,
.mmu = nv04_mmu_new,
.pci = nv40_pci_new,
@ -505,7 +505,7 @@ nv41_chipset = {
.fb = { 0x00000001, nv41_fb_new },
.gpio = { 0x00000001, nv10_gpio_new },
.i2c = { 0x00000001, nv04_i2c_new },
.imem = nv40_instmem_new,
.imem = { 0x00000001, nv40_instmem_new },
.mc = nv17_mc_new,
.mmu = nv41_mmu_new,
.pci = nv40_pci_new,
@ -531,7 +531,7 @@ nv42_chipset = {
.fb = { 0x00000001, nv41_fb_new },
.gpio = { 0x00000001, nv10_gpio_new },
.i2c = { 0x00000001, nv04_i2c_new },
.imem = nv40_instmem_new,
.imem = { 0x00000001, nv40_instmem_new },
.mc = nv17_mc_new,
.mmu = nv41_mmu_new,
.pci = nv40_pci_new,
@ -557,7 +557,7 @@ nv43_chipset = {
.fb = { 0x00000001, nv41_fb_new },
.gpio = { 0x00000001, nv10_gpio_new },
.i2c = { 0x00000001, nv04_i2c_new },
.imem = nv40_instmem_new,
.imem = { 0x00000001, nv40_instmem_new },
.mc = nv17_mc_new,
.mmu = nv41_mmu_new,
.pci = nv40_pci_new,
@ -583,7 +583,7 @@ nv44_chipset = {
.fb = { 0x00000001, nv44_fb_new },
.gpio = { 0x00000001, nv10_gpio_new },
.i2c = { 0x00000001, nv04_i2c_new },
.imem = nv40_instmem_new,
.imem = { 0x00000001, nv40_instmem_new },
.mc = nv44_mc_new,
.mmu = nv44_mmu_new,
.pci = nv40_pci_new,
@ -609,7 +609,7 @@ nv45_chipset = {
.fb = { 0x00000001, nv40_fb_new },
.gpio = { 0x00000001, nv10_gpio_new },
.i2c = { 0x00000001, nv04_i2c_new },
.imem = nv40_instmem_new,
.imem = { 0x00000001, nv40_instmem_new },
.mc = nv17_mc_new,
.mmu = nv04_mmu_new,
.pci = nv40_pci_new,
@ -635,7 +635,7 @@ nv46_chipset = {
.fb = { 0x00000001, nv46_fb_new },
.gpio = { 0x00000001, nv10_gpio_new },
.i2c = { 0x00000001, nv04_i2c_new },
.imem = nv40_instmem_new,
.imem = { 0x00000001, nv40_instmem_new },
.mc = nv44_mc_new,
.mmu = nv44_mmu_new,
.pci = nv46_pci_new,
@ -661,7 +661,7 @@ nv47_chipset = {
.fb = { 0x00000001, nv47_fb_new },
.gpio = { 0x00000001, nv10_gpio_new },
.i2c = { 0x00000001, nv04_i2c_new },
.imem = nv40_instmem_new,
.imem = { 0x00000001, nv40_instmem_new },
.mc = nv17_mc_new,
.mmu = nv41_mmu_new,
.pci = nv40_pci_new,
@ -687,7 +687,7 @@ nv49_chipset = {
.fb = { 0x00000001, nv49_fb_new },
.gpio = { 0x00000001, nv10_gpio_new },
.i2c = { 0x00000001, nv04_i2c_new },
.imem = nv40_instmem_new,
.imem = { 0x00000001, nv40_instmem_new },
.mc = nv17_mc_new,
.mmu = nv41_mmu_new,
.pci = nv40_pci_new,
@ -713,7 +713,7 @@ nv4a_chipset = {
.fb = { 0x00000001, nv44_fb_new },
.gpio = { 0x00000001, nv10_gpio_new },
.i2c = { 0x00000001, nv04_i2c_new },
.imem = nv40_instmem_new,
.imem = { 0x00000001, nv40_instmem_new },
.mc = nv44_mc_new,
.mmu = nv04_mmu_new,
.pci = nv40_pci_new,
@ -739,7 +739,7 @@ nv4b_chipset = {
.fb = { 0x00000001, nv49_fb_new },
.gpio = { 0x00000001, nv10_gpio_new },
.i2c = { 0x00000001, nv04_i2c_new },
.imem = nv40_instmem_new,
.imem = { 0x00000001, nv40_instmem_new },
.mc = nv17_mc_new,
.mmu = nv41_mmu_new,
.pci = nv40_pci_new,
@ -765,7 +765,7 @@ nv4c_chipset = {
.fb = { 0x00000001, nv46_fb_new },
.gpio = { 0x00000001, nv10_gpio_new },
.i2c = { 0x00000001, nv04_i2c_new },
.imem = nv40_instmem_new,
.imem = { 0x00000001, nv40_instmem_new },
.mc = nv44_mc_new,
.mmu = nv44_mmu_new,
.pci = nv4c_pci_new,
@ -791,7 +791,7 @@ nv4e_chipset = {
.fb = { 0x00000001, nv4e_fb_new },
.gpio = { 0x00000001, nv10_gpio_new },
.i2c = { 0x00000001, nv4e_i2c_new },
.imem = nv40_instmem_new,
.imem = { 0x00000001, nv40_instmem_new },
.mc = nv44_mc_new,
.mmu = nv44_mmu_new,
.pci = nv4c_pci_new,
@ -819,7 +819,7 @@ nv50_chipset = {
.fuse = { 0x00000001, nv50_fuse_new },
.gpio = { 0x00000001, nv50_gpio_new },
.i2c = { 0x00000001, nv50_i2c_new },
.imem = nv50_instmem_new,
.imem = { 0x00000001, nv50_instmem_new },
.mc = nv50_mc_new,
.mmu = nv50_mmu_new,
.mxm = nv50_mxm_new,
@ -846,7 +846,7 @@ nv63_chipset = {
.fb = { 0x00000001, nv46_fb_new },
.gpio = { 0x00000001, nv10_gpio_new },
.i2c = { 0x00000001, nv04_i2c_new },
.imem = nv40_instmem_new,
.imem = { 0x00000001, nv40_instmem_new },
.mc = nv44_mc_new,
.mmu = nv44_mmu_new,
.pci = nv4c_pci_new,
@ -872,7 +872,7 @@ nv67_chipset = {
.fb = { 0x00000001, nv46_fb_new },
.gpio = { 0x00000001, nv10_gpio_new },
.i2c = { 0x00000001, nv04_i2c_new },
.imem = nv40_instmem_new,
.imem = { 0x00000001, nv40_instmem_new },
.mc = nv44_mc_new,
.mmu = nv44_mmu_new,
.pci = nv4c_pci_new,
@ -898,7 +898,7 @@ nv68_chipset = {
.fb = { 0x00000001, nv46_fb_new },
.gpio = { 0x00000001, nv10_gpio_new },
.i2c = { 0x00000001, nv04_i2c_new },
.imem = nv40_instmem_new,
.imem = { 0x00000001, nv40_instmem_new },
.mc = nv44_mc_new,
.mmu = nv44_mmu_new,
.pci = nv4c_pci_new,
@ -926,7 +926,7 @@ nv84_chipset = {
.fuse = { 0x00000001, nv50_fuse_new },
.gpio = { 0x00000001, nv50_gpio_new },
.i2c = { 0x00000001, nv50_i2c_new },
.imem = nv50_instmem_new,
.imem = { 0x00000001, nv50_instmem_new },
.mc = g84_mc_new,
.mmu = g84_mmu_new,
.mxm = nv50_mxm_new,
@ -958,7 +958,7 @@ nv86_chipset = {
.fuse = { 0x00000001, nv50_fuse_new },
.gpio = { 0x00000001, nv50_gpio_new },
.i2c = { 0x00000001, nv50_i2c_new },
.imem = nv50_instmem_new,
.imem = { 0x00000001, nv50_instmem_new },
.mc = g84_mc_new,
.mmu = g84_mmu_new,
.mxm = nv50_mxm_new,
@ -990,7 +990,7 @@ nv92_chipset = {
.fuse = { 0x00000001, nv50_fuse_new },
.gpio = { 0x00000001, nv50_gpio_new },
.i2c = { 0x00000001, nv50_i2c_new },
.imem = nv50_instmem_new,
.imem = { 0x00000001, nv50_instmem_new },
.mc = g84_mc_new,
.mmu = g84_mmu_new,
.mxm = nv50_mxm_new,
@ -1022,7 +1022,7 @@ nv94_chipset = {
.fuse = { 0x00000001, nv50_fuse_new },
.gpio = { 0x00000001, g94_gpio_new },
.i2c = { 0x00000001, g94_i2c_new },
.imem = nv50_instmem_new,
.imem = { 0x00000001, nv50_instmem_new },
.mc = g84_mc_new,
.mmu = g84_mmu_new,
.mxm = nv50_mxm_new,
@ -1054,7 +1054,7 @@ nv96_chipset = {
.fuse = { 0x00000001, nv50_fuse_new },
.gpio = { 0x00000001, g94_gpio_new },
.i2c = { 0x00000001, g94_i2c_new },
.imem = nv50_instmem_new,
.imem = { 0x00000001, nv50_instmem_new },
.mc = g84_mc_new,
.mmu = g84_mmu_new,
.mxm = nv50_mxm_new,
@ -1086,7 +1086,7 @@ nv98_chipset = {
.fuse = { 0x00000001, nv50_fuse_new },
.gpio = { 0x00000001, g94_gpio_new },
.i2c = { 0x00000001, g94_i2c_new },
.imem = nv50_instmem_new,
.imem = { 0x00000001, nv50_instmem_new },
.mc = g98_mc_new,
.mmu = g84_mmu_new,
.mxm = nv50_mxm_new,
@ -1118,7 +1118,7 @@ nva0_chipset = {
.fuse = { 0x00000001, nv50_fuse_new },
.gpio = { 0x00000001, g94_gpio_new },
.i2c = { 0x00000001, nv50_i2c_new },
.imem = nv50_instmem_new,
.imem = { 0x00000001, nv50_instmem_new },
.mc = g84_mc_new,
.mmu = g84_mmu_new,
.mxm = nv50_mxm_new,
@ -1150,7 +1150,7 @@ nva3_chipset = {
.fuse = { 0x00000001, nv50_fuse_new },
.gpio = { 0x00000001, g94_gpio_new },
.i2c = { 0x00000001, g94_i2c_new },
.imem = nv50_instmem_new,
.imem = { 0x00000001, nv50_instmem_new },
.mc = gt215_mc_new,
.mmu = g84_mmu_new,
.mxm = nv50_mxm_new,
@ -1184,7 +1184,7 @@ nva5_chipset = {
.fuse = { 0x00000001, nv50_fuse_new },
.gpio = { 0x00000001, g94_gpio_new },
.i2c = { 0x00000001, g94_i2c_new },
.imem = nv50_instmem_new,
.imem = { 0x00000001, nv50_instmem_new },
.mc = gt215_mc_new,
.mmu = g84_mmu_new,
.mxm = nv50_mxm_new,
@ -1217,7 +1217,7 @@ nva8_chipset = {
.fuse = { 0x00000001, nv50_fuse_new },
.gpio = { 0x00000001, g94_gpio_new },
.i2c = { 0x00000001, g94_i2c_new },
.imem = nv50_instmem_new,
.imem = { 0x00000001, nv50_instmem_new },
.mc = gt215_mc_new,
.mmu = g84_mmu_new,
.mxm = nv50_mxm_new,
@ -1250,7 +1250,7 @@ nvaa_chipset = {
.fuse = { 0x00000001, nv50_fuse_new },
.gpio = { 0x00000001, g94_gpio_new },
.i2c = { 0x00000001, g94_i2c_new },
.imem = nv50_instmem_new,
.imem = { 0x00000001, nv50_instmem_new },
.mc = g98_mc_new,
.mmu = mcp77_mmu_new,
.mxm = nv50_mxm_new,
@ -1282,7 +1282,7 @@ nvac_chipset = {
.fuse = { 0x00000001, nv50_fuse_new },
.gpio = { 0x00000001, g94_gpio_new },
.i2c = { 0x00000001, g94_i2c_new },
.imem = nv50_instmem_new,
.imem = { 0x00000001, nv50_instmem_new },
.mc = g98_mc_new,
.mmu = mcp77_mmu_new,
.mxm = nv50_mxm_new,
@ -1314,7 +1314,7 @@ nvaf_chipset = {
.fuse = { 0x00000001, nv50_fuse_new },
.gpio = { 0x00000001, g94_gpio_new },
.i2c = { 0x00000001, g94_i2c_new },
.imem = nv50_instmem_new,
.imem = { 0x00000001, nv50_instmem_new },
.mc = gt215_mc_new,
.mmu = mcp77_mmu_new,
.mxm = nv50_mxm_new,
@ -1349,7 +1349,7 @@ nvc0_chipset = {
.i2c = { 0x00000001, g94_i2c_new },
.ibus = { 0x00000001, gf100_ibus_new },
.iccsense = { 0x00000001, gf100_iccsense_new },
.imem = nv50_instmem_new,
.imem = { 0x00000001, nv50_instmem_new },
.ltc = gf100_ltc_new,
.mc = gf100_mc_new,
.mmu = gf100_mmu_new,
@ -1386,7 +1386,7 @@ nvc1_chipset = {
.i2c = { 0x00000001, g94_i2c_new },
.ibus = { 0x00000001, gf100_ibus_new },
.iccsense = { 0x00000001, gf100_iccsense_new },
.imem = nv50_instmem_new,
.imem = { 0x00000001, nv50_instmem_new },
.ltc = gf100_ltc_new,
.mc = gf100_mc_new,
.mmu = gf100_mmu_new,
@ -1422,7 +1422,7 @@ nvc3_chipset = {
.i2c = { 0x00000001, g94_i2c_new },
.ibus = { 0x00000001, gf100_ibus_new },
.iccsense = { 0x00000001, gf100_iccsense_new },
.imem = nv50_instmem_new,
.imem = { 0x00000001, nv50_instmem_new },
.ltc = gf100_ltc_new,
.mc = gf100_mc_new,
.mmu = gf100_mmu_new,
@ -1458,7 +1458,7 @@ nvc4_chipset = {
.i2c = { 0x00000001, g94_i2c_new },
.ibus = { 0x00000001, gf100_ibus_new },
.iccsense = { 0x00000001, gf100_iccsense_new },
.imem = nv50_instmem_new,
.imem = { 0x00000001, nv50_instmem_new },
.ltc = gf100_ltc_new,
.mc = gf100_mc_new,
.mmu = gf100_mmu_new,
@ -1495,7 +1495,7 @@ nvc8_chipset = {
.i2c = { 0x00000001, g94_i2c_new },
.ibus = { 0x00000001, gf100_ibus_new },
.iccsense = { 0x00000001, gf100_iccsense_new },
.imem = nv50_instmem_new,
.imem = { 0x00000001, nv50_instmem_new },
.ltc = gf100_ltc_new,
.mc = gf100_mc_new,
.mmu = gf100_mmu_new,
@ -1532,7 +1532,7 @@ nvce_chipset = {
.i2c = { 0x00000001, g94_i2c_new },
.ibus = { 0x00000001, gf100_ibus_new },
.iccsense = { 0x00000001, gf100_iccsense_new },
.imem = nv50_instmem_new,
.imem = { 0x00000001, nv50_instmem_new },
.ltc = gf100_ltc_new,
.mc = gf100_mc_new,
.mmu = gf100_mmu_new,
@ -1569,7 +1569,7 @@ nvcf_chipset = {
.i2c = { 0x00000001, g94_i2c_new },
.ibus = { 0x00000001, gf100_ibus_new },
.iccsense = { 0x00000001, gf100_iccsense_new },
.imem = nv50_instmem_new,
.imem = { 0x00000001, nv50_instmem_new },
.ltc = gf100_ltc_new,
.mc = gf100_mc_new,
.mmu = gf100_mmu_new,
@ -1605,7 +1605,7 @@ nvd7_chipset = {
.i2c = { 0x00000001, gf117_i2c_new },
.ibus = { 0x00000001, gf117_ibus_new },
.iccsense = { 0x00000001, gf100_iccsense_new },
.imem = nv50_instmem_new,
.imem = { 0x00000001, nv50_instmem_new },
.ltc = gf100_ltc_new,
.mc = gf100_mc_new,
.mmu = gf100_mmu_new,
@ -1640,7 +1640,7 @@ nvd9_chipset = {
.i2c = { 0x00000001, gf119_i2c_new },
.ibus = { 0x00000001, gf117_ibus_new },
.iccsense = { 0x00000001, gf100_iccsense_new },
.imem = nv50_instmem_new,
.imem = { 0x00000001, nv50_instmem_new },
.ltc = gf100_ltc_new,
.mc = gf100_mc_new,
.mmu = gf100_mmu_new,
@ -1676,7 +1676,7 @@ nve4_chipset = {
.i2c = { 0x00000001, gk104_i2c_new },
.ibus = { 0x00000001, gk104_ibus_new },
.iccsense = { 0x00000001, gf100_iccsense_new },
.imem = nv50_instmem_new,
.imem = { 0x00000001, nv50_instmem_new },
.ltc = gk104_ltc_new,
.mc = gk104_mc_new,
.mmu = gk104_mmu_new,
@ -1715,7 +1715,7 @@ nve6_chipset = {
.i2c = { 0x00000001, gk104_i2c_new },
.ibus = { 0x00000001, gk104_ibus_new },
.iccsense = { 0x00000001, gf100_iccsense_new },
.imem = nv50_instmem_new,
.imem = { 0x00000001, nv50_instmem_new },
.ltc = gk104_ltc_new,
.mc = gk104_mc_new,
.mmu = gk104_mmu_new,
@ -1754,7 +1754,7 @@ nve7_chipset = {
.i2c = { 0x00000001, gk104_i2c_new },
.ibus = { 0x00000001, gk104_ibus_new },
.iccsense = { 0x00000001, gf100_iccsense_new },
.imem = nv50_instmem_new,
.imem = { 0x00000001, nv50_instmem_new },
.ltc = gk104_ltc_new,
.mc = gk104_mc_new,
.mmu = gk104_mmu_new,
@ -1788,7 +1788,7 @@ nvea_chipset = {
.fb = { 0x00000001, gk20a_fb_new },
.fuse = { 0x00000001, gf100_fuse_new },
.ibus = { 0x00000001, gk20a_ibus_new },
.imem = gk20a_instmem_new,
.imem = { 0x00000001, gk20a_instmem_new },
.ltc = gk104_ltc_new,
.mc = gk20a_mc_new,
.mmu = gk20a_mmu_new,
@ -1818,7 +1818,7 @@ nvf0_chipset = {
.i2c = { 0x00000001, gk110_i2c_new },
.ibus = { 0x00000001, gk104_ibus_new },
.iccsense = { 0x00000001, gf100_iccsense_new },
.imem = nv50_instmem_new,
.imem = { 0x00000001, nv50_instmem_new },
.ltc = gk104_ltc_new,
.mc = gk104_mc_new,
.mmu = gk104_mmu_new,
@ -1856,7 +1856,7 @@ nvf1_chipset = {
.i2c = { 0x00000001, gk110_i2c_new },
.ibus = { 0x00000001, gk104_ibus_new },
.iccsense = { 0x00000001, gf100_iccsense_new },
.imem = nv50_instmem_new,
.imem = { 0x00000001, nv50_instmem_new },
.ltc = gk104_ltc_new,
.mc = gk104_mc_new,
.mmu = gk104_mmu_new,
@ -1894,7 +1894,7 @@ nv106_chipset = {
.i2c = { 0x00000001, gk110_i2c_new },
.ibus = { 0x00000001, gk104_ibus_new },
.iccsense = { 0x00000001, gf100_iccsense_new },
.imem = nv50_instmem_new,
.imem = { 0x00000001, nv50_instmem_new },
.ltc = gk104_ltc_new,
.mc = gk20a_mc_new,
.mmu = gk104_mmu_new,
@ -1932,7 +1932,7 @@ nv108_chipset = {
.i2c = { 0x00000001, gk110_i2c_new },
.ibus = { 0x00000001, gk104_ibus_new },
.iccsense = { 0x00000001, gf100_iccsense_new },
.imem = nv50_instmem_new,
.imem = { 0x00000001, nv50_instmem_new },
.ltc = gk104_ltc_new,
.mc = gk20a_mc_new,
.mmu = gk104_mmu_new,
@ -1970,7 +1970,7 @@ nv117_chipset = {
.i2c = { 0x00000001, gk110_i2c_new },
.ibus = { 0x00000001, gk104_ibus_new },
.iccsense = { 0x00000001, gf100_iccsense_new },
.imem = nv50_instmem_new,
.imem = { 0x00000001, nv50_instmem_new },
.ltc = gm107_ltc_new,
.mc = gk20a_mc_new,
.mmu = gk104_mmu_new,
@ -2006,7 +2006,7 @@ nv118_chipset = {
.i2c = { 0x00000001, gk110_i2c_new },
.ibus = { 0x00000001, gk104_ibus_new },
.iccsense = { 0x00000001, gf100_iccsense_new },
.imem = nv50_instmem_new,
.imem = { 0x00000001, nv50_instmem_new },
.ltc = gm107_ltc_new,
.mc = gk20a_mc_new,
.mmu = gk104_mmu_new,
@ -2040,7 +2040,7 @@ nv120_chipset = {
.i2c = { 0x00000001, gm200_i2c_new },
.ibus = { 0x00000001, gm200_ibus_new },
.iccsense = { 0x00000001, gf100_iccsense_new },
.imem = nv50_instmem_new,
.imem = { 0x00000001, nv50_instmem_new },
.ltc = gm200_ltc_new,
.mc = gk20a_mc_new,
.mmu = gm200_mmu_new,
@ -2078,7 +2078,7 @@ nv124_chipset = {
.i2c = { 0x00000001, gm200_i2c_new },
.ibus = { 0x00000001, gm200_ibus_new },
.iccsense = { 0x00000001, gf100_iccsense_new },
.imem = nv50_instmem_new,
.imem = { 0x00000001, nv50_instmem_new },
.ltc = gm200_ltc_new,
.mc = gk20a_mc_new,
.mmu = gm200_mmu_new,
@ -2116,7 +2116,7 @@ nv126_chipset = {
.i2c = { 0x00000001, gm200_i2c_new },
.ibus = { 0x00000001, gm200_ibus_new },
.iccsense = { 0x00000001, gf100_iccsense_new },
.imem = nv50_instmem_new,
.imem = { 0x00000001, nv50_instmem_new },
.ltc = gm200_ltc_new,
.mc = gk20a_mc_new,
.mmu = gm200_mmu_new,
@ -2149,7 +2149,7 @@ nv12b_chipset = {
.fb = { 0x00000001, gm20b_fb_new },
.fuse = { 0x00000001, gm107_fuse_new },
.ibus = { 0x00000001, gk20a_ibus_new },
.imem = gk20a_instmem_new,
.imem = { 0x00000001, gk20a_instmem_new },
.ltc = gm200_ltc_new,
.mc = gk20a_mc_new,
.mmu = gm20b_mmu_new,
@ -2178,7 +2178,7 @@ nv130_chipset = {
.gpio = { 0x00000001, gk104_gpio_new },
.i2c = { 0x00000001, gm200_i2c_new },
.ibus = { 0x00000001, gm200_ibus_new },
.imem = nv50_instmem_new,
.imem = { 0x00000001, nv50_instmem_new },
.ltc = gp100_ltc_new,
.mc = gp100_mc_new,
.mmu = gp100_mmu_new,
@ -2218,7 +2218,7 @@ nv132_chipset = {
.gpio = { 0x00000001, gk104_gpio_new },
.i2c = { 0x00000001, gm200_i2c_new },
.ibus = { 0x00000001, gm200_ibus_new },
.imem = nv50_instmem_new,
.imem = { 0x00000001, nv50_instmem_new },
.ltc = gp102_ltc_new,
.mc = gp100_mc_new,
.mmu = gp100_mmu_new,
@ -2256,7 +2256,7 @@ nv134_chipset = {
.gpio = { 0x00000001, gk104_gpio_new },
.i2c = { 0x00000001, gm200_i2c_new },
.ibus = { 0x00000001, gm200_ibus_new },
.imem = nv50_instmem_new,
.imem = { 0x00000001, nv50_instmem_new },
.ltc = gp102_ltc_new,
.mc = gp100_mc_new,
.mmu = gp100_mmu_new,
@ -2294,7 +2294,7 @@ nv136_chipset = {
.gpio = { 0x00000001, gk104_gpio_new },
.i2c = { 0x00000001, gm200_i2c_new },
.ibus = { 0x00000001, gm200_ibus_new },
.imem = nv50_instmem_new,
.imem = { 0x00000001, nv50_instmem_new },
.ltc = gp102_ltc_new,
.mc = gp100_mc_new,
.mmu = gp100_mmu_new,
@ -2331,7 +2331,7 @@ nv137_chipset = {
.gpio = { 0x00000001, gk104_gpio_new },
.i2c = { 0x00000001, gm200_i2c_new },
.ibus = { 0x00000001, gm200_ibus_new },
.imem = nv50_instmem_new,
.imem = { 0x00000001, nv50_instmem_new },
.ltc = gp102_ltc_new,
.mc = gp100_mc_new,
.mmu = gp100_mmu_new,
@ -2369,7 +2369,7 @@ nv138_chipset = {
.gpio = { 0x00000001, gk104_gpio_new },
.i2c = { 0x00000001, gm200_i2c_new },
.ibus = { 0x00000001, gm200_ibus_new },
.imem = nv50_instmem_new,
.imem = { 0x00000001, nv50_instmem_new },
.ltc = gp102_ltc_new,
.mc = gp100_mc_new,
.mmu = gp100_mmu_new,
@ -2401,7 +2401,7 @@ nv13b_chipset = {
.fb = { 0x00000001, gp10b_fb_new },
.fuse = { 0x00000001, gm107_fuse_new },
.ibus = { 0x00000001, gp10b_ibus_new },
.imem = gk20a_instmem_new,
.imem = { 0x00000001, gk20a_instmem_new },
.ltc = gp10b_ltc_new,
.mc = gp10b_mc_new,
.mmu = gp10b_mmu_new,
@ -2430,7 +2430,7 @@ nv140_chipset = {
.gsp = { 0x00000001, gv100_gsp_new },
.i2c = { 0x00000001, gm200_i2c_new },
.ibus = { 0x00000001, gm200_ibus_new },
.imem = nv50_instmem_new,
.imem = { 0x00000001, nv50_instmem_new },
.ltc = gp102_ltc_new,
.mc = gp100_mc_new,
.mmu = gv100_mmu_new,
@ -2474,7 +2474,7 @@ nv162_chipset = {
.gsp = { 0x00000001, gv100_gsp_new },
.i2c = { 0x00000001, gm200_i2c_new },
.ibus = { 0x00000001, gm200_ibus_new },
.imem = nv50_instmem_new,
.imem = { 0x00000001, nv50_instmem_new },
.ltc = gp102_ltc_new,
.mc = tu102_mc_new,
.mmu = tu102_mmu_new,
@ -2512,7 +2512,7 @@ nv164_chipset = {
.gsp = { 0x00000001, gv100_gsp_new },
.i2c = { 0x00000001, gm200_i2c_new },
.ibus = { 0x00000001, gm200_ibus_new },
.imem = nv50_instmem_new,
.imem = { 0x00000001, nv50_instmem_new },
.ltc = gp102_ltc_new,
.mc = tu102_mc_new,
.mmu = tu102_mmu_new,
@ -2551,7 +2551,7 @@ nv166_chipset = {
.gsp = { 0x00000001, gv100_gsp_new },
.i2c = { 0x00000001, gm200_i2c_new },
.ibus = { 0x00000001, gm200_ibus_new },
.imem = nv50_instmem_new,
.imem = { 0x00000001, nv50_instmem_new },
.ltc = gp102_ltc_new,
.mc = tu102_mc_new,
.mmu = tu102_mmu_new,
@ -2591,7 +2591,7 @@ nv167_chipset = {
.gsp = { 0x00000001, gv100_gsp_new },
.i2c = { 0x00000001, gm200_i2c_new },
.ibus = { 0x00000001, gm200_ibus_new },
.imem = nv50_instmem_new,
.imem = { 0x00000001, nv50_instmem_new },
.ltc = gp102_ltc_new,
.mc = tu102_mc_new,
.mmu = tu102_mmu_new,
@ -2629,7 +2629,7 @@ nv168_chipset = {
.gsp = { 0x00000001, gv100_gsp_new },
.i2c = { 0x00000001, gm200_i2c_new },
.ibus = { 0x00000001, gm200_ibus_new },
.imem = nv50_instmem_new,
.imem = { 0x00000001, nv50_instmem_new },
.ltc = gp102_ltc_new,
.mc = tu102_mc_new,
.mmu = tu102_mmu_new,
@ -2662,7 +2662,7 @@ nv170_chipset = {
.gpio = { 0x00000001, gk104_gpio_new },
.i2c = { 0x00000001, gm200_i2c_new },
.ibus = { 0x00000001, gm200_ibus_new },
.imem = nv50_instmem_new,
.imem = { 0x00000001, nv50_instmem_new },
.mc = ga100_mc_new,
.mmu = tu102_mmu_new,
.pci = gp100_pci_new,
@ -2679,7 +2679,7 @@ nv172_chipset = {
.gpio = { 0x00000001, ga102_gpio_new },
.i2c = { 0x00000001, gm200_i2c_new },
.ibus = { 0x00000001, gm200_ibus_new },
.imem = nv50_instmem_new,
.imem = { 0x00000001, nv50_instmem_new },
.mc = ga100_mc_new,
.mmu = tu102_mmu_new,
.pci = gp100_pci_new,
@ -2698,7 +2698,7 @@ nv174_chipset = {
.gpio = { 0x00000001, ga102_gpio_new },
.i2c = { 0x00000001, gm200_i2c_new },
.ibus = { 0x00000001, gm200_ibus_new },
.imem = nv50_instmem_new,
.imem = { 0x00000001, nv50_instmem_new },
.mc = ga100_mc_new,
.mmu = tu102_mmu_new,
.pci = gp100_pci_new,
@ -3248,7 +3248,6 @@ nvkm_device_ctor(const struct nvkm_device_func *func,
#include <core/layout.h>
#undef NVKM_LAYOUT_INST
#undef NVKM_LAYOUT_ONCE
_(NVKM_SUBDEV_INSTMEM , imem);
_(NVKM_SUBDEV_LTC , ltc);
_(NVKM_SUBDEV_MC , mc);
_(NVKM_SUBDEV_MMU , mmu);

7
drivers/gpu/drm/nouveau/nvkm/subdev/instmem/base.c
View File

@ -234,11 +234,10 @@ nvkm_instmem = {
};
void
nvkm_instmem_ctor(const struct nvkm_instmem_func *func,
struct nvkm_device *device, int index,
struct nvkm_instmem *imem)
nvkm_instmem_ctor(const struct nvkm_instmem_func *func, struct nvkm_device *device,
enum nvkm_subdev_type type, int inst, struct nvkm_instmem *imem)
{
nvkm_subdev_ctor(&nvkm_instmem, device, index, &imem->subdev);
nvkm_subdev_ctor(&nvkm_instmem, device, type, inst, &imem->subdev);
imem->func = func;
spin_lock_init(&imem->lock);
INIT_LIST_HEAD(&imem->list);

4
drivers/gpu/drm/nouveau/nvkm/subdev/instmem/gk20a.c
View File

@ -568,7 +568,7 @@ gk20a_instmem = {
};
int
gk20a_instmem_new(struct nvkm_device *device, int index,
gk20a_instmem_new(struct nvkm_device *device, enum nvkm_subdev_type type, int inst,
struct nvkm_instmem **pimem)
{
struct nvkm_device_tegra *tdev = device->func->tegra(device);
@ -576,7 +576,7 @@ gk20a_instmem_new(struct nvkm_device *device, int index,
if (!(imem = kzalloc(sizeof(*imem), GFP_KERNEL)))
return -ENOMEM;
nvkm_instmem_ctor(&gk20a_instmem, device, index, &imem->base);
nvkm_instmem_ctor(&gk20a_instmem, device, type, inst, &imem->base);
mutex_init(&imem->lock);
*pimem = &imem->base;

4
drivers/gpu/drm/nouveau/nvkm/subdev/instmem/nv04.c
View File

@ -217,14 +217,14 @@ nv04_instmem = {
};
int
nv04_instmem_new(struct nvkm_device *device, int index,
nv04_instmem_new(struct nvkm_device *device, enum nvkm_subdev_type type, int inst,
struct nvkm_instmem **pimem)
{
struct nv04_instmem *imem;
if (!(imem = kzalloc(sizeof(*imem), GFP_KERNEL)))
return -ENOMEM;
nvkm_instmem_ctor(&nv04_instmem, device, index, &imem->base);
nvkm_instmem_ctor(&nv04_instmem, device, type, inst, &imem->base);
*pimem = &imem->base;
return 0;
}

4
drivers/gpu/drm/nouveau/nvkm/subdev/instmem/nv40.c
View File

@ -235,7 +235,7 @@ nv40_instmem = {
};
int
nv40_instmem_new(struct nvkm_device *device, int index,
nv40_instmem_new(struct nvkm_device *device, enum nvkm_subdev_type type, int inst,
struct nvkm_instmem **pimem)
{
struct nv40_instmem *imem;
@ -243,7 +243,7 @@ nv40_instmem_new(struct nvkm_device *device, int index,
if (!(imem = kzalloc(sizeof(*imem), GFP_KERNEL)))
return -ENOMEM;
nvkm_instmem_ctor(&nv40_instmem, device, index, &imem->base);
nvkm_instmem_ctor(&nv40_instmem, device, type, inst, &imem->base);
*pimem = &imem->base;
/* map bar */

4
drivers/gpu/drm/nouveau/nvkm/subdev/instmem/nv50.c
View File

@ -386,14 +386,14 @@ nv50_instmem = {
};
int
nv50_instmem_new(struct nvkm_device *device, int index,
nv50_instmem_new(struct nvkm_device *device, enum nvkm_subdev_type type, int inst,
struct nvkm_instmem **pimem)
{
struct nv50_instmem *imem;
if (!(imem = kzalloc(sizeof(*imem), GFP_KERNEL)))
return -ENOMEM;
nvkm_instmem_ctor(&nv50_instmem, device, index, &imem->base);
nvkm_instmem_ctor(&nv50_instmem, device, type, inst, &imem->base);
INIT_LIST_HEAD(&imem->lru);
*pimem = &imem->base;
return 0;

2
drivers/gpu/drm/nouveau/nvkm/subdev/instmem/priv.h
View File

@ -16,7 +16,7 @@ struct nvkm_instmem_func {
};
void nvkm_instmem_ctor(const struct nvkm_instmem_func *, struct nvkm_device *,
int index, struct nvkm_instmem *);
enum nvkm_subdev_type, int, struct nvkm_instmem *);
void nvkm_instmem_boot(struct nvkm_instmem *);
#include <core/memory.h>