drm/vmwgfx: Update the svga3d register header file for new device version
Signed-off-by: Thomas Hellstrom <thellstrom@vmware.com> Reviewed-by: Brian Paul <brianp@vmware.com> Reviewed-by: Zack Rusin <zackr@vmware.com>
This commit is contained in:
parent
0d00c488f3
commit
d9019498dd
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@ -34,6 +34,7 @@
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#include "svga_reg.h"
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typedef uint32 PPN;
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/*
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* 3D Hardware Version
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@ -71,6 +72,9 @@ typedef uint32 SVGA3dBool; /* 32-bit Bool definition */
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#define SVGA3D_MAX_CONTEXT_IDS 256
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#define SVGA3D_MAX_SURFACE_IDS (32 * 1024)
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#define SVGA3D_NUM_TEXTURE_UNITS 32
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#define SVGA3D_NUM_LIGHTS 8
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/*
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* Surface formats.
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*
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@ -81,6 +85,7 @@ typedef uint32 SVGA3dBool; /* 32-bit Bool definition */
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*/
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typedef enum SVGA3dSurfaceFormat {
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SVGA3D_FORMAT_MIN = 0,
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SVGA3D_FORMAT_INVALID = 0,
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SVGA3D_X8R8G8B8 = 1,
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@ -134,12 +139,6 @@ typedef enum SVGA3dSurfaceFormat {
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SVGA3D_RG_S10E5 = 35,
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SVGA3D_RG_S23E8 = 36,
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/*
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* Any surface can be used as a buffer object, but SVGA3D_BUFFER is
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* the most efficient format to use when creating new surfaces
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* expressly for index or vertex data.
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*/
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SVGA3D_BUFFER = 37,
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SVGA3D_Z_D24X8 = 38,
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@ -159,15 +158,114 @@ typedef enum SVGA3dSurfaceFormat {
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/* Video format with alpha */
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SVGA3D_AYUV = 45,
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SVGA3D_R32G32B32A32_TYPELESS = 46,
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SVGA3D_R32G32B32A32_FLOAT = 25,
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SVGA3D_R32G32B32A32_UINT = 47,
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SVGA3D_R32G32B32A32_SINT = 48,
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SVGA3D_R32G32B32_TYPELESS = 49,
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SVGA3D_R32G32B32_FLOAT = 50,
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SVGA3D_R32G32B32_UINT = 51,
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SVGA3D_R32G32B32_SINT = 52,
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SVGA3D_R16G16B16A16_TYPELESS = 53,
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SVGA3D_R16G16B16A16_FLOAT = 24,
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SVGA3D_R16G16B16A16_UNORM = 41,
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SVGA3D_R16G16B16A16_UINT = 54,
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SVGA3D_R16G16B16A16_SNORM = 55,
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SVGA3D_R16G16B16A16_SINT = 56,
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SVGA3D_R32G32_TYPELESS = 57,
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SVGA3D_R32G32_FLOAT = 36,
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SVGA3D_R32G32_UINT = 58,
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SVGA3D_R32G32_SINT = 59,
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SVGA3D_R32G8X24_TYPELESS = 60,
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SVGA3D_D32_FLOAT_S8X24_UINT = 61,
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SVGA3D_R32_FLOAT_X8X24_TYPELESS = 62,
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SVGA3D_X32_TYPELESS_G8X24_UINT = 63,
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SVGA3D_R10G10B10A2_TYPELESS = 64,
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SVGA3D_R10G10B10A2_UNORM = 26,
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SVGA3D_R10G10B10A2_UINT = 65,
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SVGA3D_R11G11B10_FLOAT = 66,
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SVGA3D_R8G8B8A8_TYPELESS = 67,
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SVGA3D_R8G8B8A8_UNORM = 68,
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SVGA3D_R8G8B8A8_UNORM_SRGB = 69,
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SVGA3D_R8G8B8A8_UINT = 70,
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SVGA3D_R8G8B8A8_SNORM = 28,
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SVGA3D_R8G8B8A8_SINT = 71,
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SVGA3D_R16G16_TYPELESS = 72,
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SVGA3D_R16G16_FLOAT = 35,
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SVGA3D_R16G16_UNORM = 40,
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SVGA3D_R16G16_UINT = 73,
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SVGA3D_R16G16_SNORM = 39,
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SVGA3D_R16G16_SINT = 74,
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SVGA3D_R32_TYPELESS = 75,
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SVGA3D_D32_FLOAT = 76,
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SVGA3D_R32_FLOAT = 34,
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SVGA3D_R32_UINT = 77,
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SVGA3D_R32_SINT = 78,
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SVGA3D_R24G8_TYPELESS = 79,
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SVGA3D_D24_UNORM_S8_UINT = 80,
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SVGA3D_R24_UNORM_X8_TYPELESS = 81,
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SVGA3D_X24_TYPELESS_G8_UINT = 82,
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SVGA3D_R8G8_TYPELESS = 83,
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SVGA3D_R8G8_UNORM = 84,
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SVGA3D_R8G8_UINT = 85,
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SVGA3D_R8G8_SNORM = 27,
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SVGA3D_R8G8_SINT = 86,
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SVGA3D_R16_TYPELESS = 87,
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SVGA3D_R16_FLOAT = 33,
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SVGA3D_D16_UNORM = 8,
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SVGA3D_R16_UNORM = 88,
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SVGA3D_R16_UINT = 89,
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SVGA3D_R16_SNORM = 90,
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SVGA3D_R16_SINT = 91,
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SVGA3D_R8_TYPELESS = 92,
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SVGA3D_R8_UNORM = 93,
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SVGA3D_R8_UINT = 94,
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SVGA3D_R8_SNORM = 95,
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SVGA3D_R8_SINT = 96,
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SVGA3D_A8_UNORM = 32,
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SVGA3D_R1_UNORM = 97,
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SVGA3D_R9G9B9E5_SHAREDEXP = 98,
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SVGA3D_R8G8_B8G8_UNORM = 99,
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SVGA3D_G8R8_G8B8_UNORM = 100,
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SVGA3D_BC1_TYPELESS = 101,
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SVGA3D_BC1_UNORM = 15,
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SVGA3D_BC1_UNORM_SRGB = 102,
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SVGA3D_BC2_TYPELESS = 103,
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SVGA3D_BC2_UNORM = 17,
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SVGA3D_BC2_UNORM_SRGB = 104,
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SVGA3D_BC3_TYPELESS = 105,
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SVGA3D_BC3_UNORM = 19,
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SVGA3D_BC3_UNORM_SRGB = 106,
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SVGA3D_BC4_TYPELESS = 107,
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SVGA3D_BC4_UNORM = 108,
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SVGA3D_BC4_SNORM = 109,
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SVGA3D_BC5_TYPELESS = 110,
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SVGA3D_BC5_UNORM = 111,
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SVGA3D_BC5_SNORM = 112,
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SVGA3D_B5G6R5_UNORM = 3,
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SVGA3D_B5G5R5A1_UNORM = 5,
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SVGA3D_B8G8R8A8_UNORM = 2,
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SVGA3D_B8G8R8X8_UNORM = 1,
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SVGA3D_R10G10B10_XR_BIAS_A2_UNORM = 113,
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SVGA3D_B8G8R8A8_TYPELESS = 114,
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SVGA3D_B8G8R8A8_UNORM_SRGB = 115,
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SVGA3D_B8G8R8X8_TYPELESS = 116,
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SVGA3D_B8G8R8X8_UNORM_SRGB = 117,
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/* Advanced D3D9 depth formats. */
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SVGA3D_Z_DF16 = 118,
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SVGA3D_Z_DF24 = 119,
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SVGA3D_Z_D24S8_INT = 120,
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SVGA3D_FORMAT_MAX
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/* Planar video formats. */
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SVGA3D_YV12 = 121,
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/* Shader constant formats. */
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SVGA3D_SURFACE_SHADERCONST_FLOAT = 122,
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SVGA3D_SURFACE_SHADERCONST_INT = 123,
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SVGA3D_SURFACE_SHADERCONST_BOOL = 124,
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SVGA3D_FORMAT_MAX = 125,
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} SVGA3dSurfaceFormat;
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typedef uint32 SVGA3dColor; /* a, r, g, b */
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@ -957,15 +1055,21 @@ typedef enum {
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} SVGA3dCubeFace;
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typedef enum {
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SVGA3D_SHADERTYPE_INVALID = 0,
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SVGA3D_SHADERTYPE_MIN = 1,
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SVGA3D_SHADERTYPE_VS = 1,
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SVGA3D_SHADERTYPE_PS = 2,
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SVGA3D_SHADERTYPE_MAX
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SVGA3D_SHADERTYPE_MAX = 3,
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SVGA3D_SHADERTYPE_GS = 3,
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} SVGA3dShaderType;
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#define SVGA3D_NUM_SHADERTYPE (SVGA3D_SHADERTYPE_MAX - SVGA3D_SHADERTYPE_MIN)
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typedef enum {
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SVGA3D_CONST_TYPE_FLOAT = 0,
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SVGA3D_CONST_TYPE_INT = 1,
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SVGA3D_CONST_TYPE_BOOL = 2,
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SVGA3D_CONST_TYPE_MAX
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} SVGA3dShaderConstType;
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#define SVGA3D_MAX_SURFACE_FACES 6
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@ -1056,9 +1160,71 @@ typedef enum {
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#define SVGA_3D_CMD_GENERATE_MIPMAPS SVGA_3D_CMD_BASE + 31
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#define SVGA_3D_CMD_ACTIVATE_SURFACE SVGA_3D_CMD_BASE + 40
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#define SVGA_3D_CMD_DEACTIVATE_SURFACE SVGA_3D_CMD_BASE + 41
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#define SVGA_3D_CMD_MAX SVGA_3D_CMD_BASE + 42
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#define SVGA_3D_CMD_SCREEN_DMA 1082
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#define SVGA_3D_CMD_SET_UNITY_SURFACE_COOKIE 1083
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#define SVGA_3D_CMD_OPEN_CONTEXT_SURFACE 1084
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#define SVGA_3D_CMD_FUTURE_MAX 2000
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#define SVGA_3D_CMD_LOGICOPS_BITBLT 1085
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#define SVGA_3D_CMD_LOGICOPS_TRANSBLT 1086
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#define SVGA_3D_CMD_LOGICOPS_STRETCHBLT 1087
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#define SVGA_3D_CMD_LOGICOPS_COLORFILL 1088
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#define SVGA_3D_CMD_LOGICOPS_ALPHABLEND 1089
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#define SVGA_3D_CMD_LOGICOPS_CLEARTYPEBLEND 1090
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#define SVGA_3D_CMD_SET_OTABLE_BASE 1091
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#define SVGA_3D_CMD_READBACK_OTABLE 1092
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#define SVGA_3D_CMD_DEFINE_GB_MOB 1093
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#define SVGA_3D_CMD_DESTROY_GB_MOB 1094
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#define SVGA_3D_CMD_REDEFINE_GB_MOB 1095
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#define SVGA_3D_CMD_UPDATE_GB_MOB_MAPPING 1096
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#define SVGA_3D_CMD_DEFINE_GB_SURFACE 1097
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#define SVGA_3D_CMD_DESTROY_GB_SURFACE 1098
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#define SVGA_3D_CMD_BIND_GB_SURFACE 1099
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#define SVGA_3D_CMD_COND_BIND_GB_SURFACE 1100
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#define SVGA_3D_CMD_UPDATE_GB_IMAGE 1101
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#define SVGA_3D_CMD_UPDATE_GB_SURFACE 1102
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#define SVGA_3D_CMD_READBACK_GB_IMAGE 1103
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#define SVGA_3D_CMD_READBACK_GB_SURFACE 1104
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#define SVGA_3D_CMD_INVALIDATE_GB_IMAGE 1105
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#define SVGA_3D_CMD_INVALIDATE_GB_SURFACE 1106
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#define SVGA_3D_CMD_DEFINE_GB_CONTEXT 1107
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#define SVGA_3D_CMD_DESTROY_GB_CONTEXT 1108
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#define SVGA_3D_CMD_BIND_GB_CONTEXT 1109
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#define SVGA_3D_CMD_READBACK_GB_CONTEXT 1110
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#define SVGA_3D_CMD_INVALIDATE_GB_CONTEXT 1111
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#define SVGA_3D_CMD_DEFINE_GB_SHADER 1112
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#define SVGA_3D_CMD_DESTROY_GB_SHADER 1113
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#define SVGA_3D_CMD_BIND_GB_SHADER 1114
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#define SVGA_3D_CMD_BIND_SHADERCONSTS 1115
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#define SVGA_3D_CMD_BEGIN_GB_QUERY 1116
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#define SVGA_3D_CMD_END_GB_QUERY 1117
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#define SVGA_3D_CMD_WAIT_FOR_GB_QUERY 1118
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#define SVGA_3D_CMD_NOP 1119
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#define SVGA_3D_CMD_ENABLE_GART 1120
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#define SVGA_3D_CMD_DISABLE_GART 1121
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#define SVGA_3D_CMD_MAP_MOB_INTO_GART 1122
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#define SVGA_3D_CMD_UNMAP_GART_RANGE 1123
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#define SVGA_3D_CMD_DEFINE_GB_SCREENTARGET 1124
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#define SVGA_3D_CMD_DESTROY_GB_SCREENTARGET 1125
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#define SVGA_3D_CMD_BIND_GB_SCREENTARGET 1126
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#define SVGA_3D_CMD_UPDATE_GB_SCREENTARGET 1127
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#define SVGA_3D_CMD_READBACK_GB_IMAGE_PARTIAL 1128
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#define SVGA_3D_CMD_INVALIDATE_GB_IMAGE_PARTIAL 1129
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#define SVGA_3D_CMD_SET_GB_SHADERCONSTS_INLINE 1130
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#define SVGA_3D_CMD_MAX 1131
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#define SVGA_3D_CMD_FUTURE_MAX 3000
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/*
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* Common substructures used in multiple FIFO commands:
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@ -1749,6 +1915,445 @@ struct {
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} SVGA3dCmdGenerateMipmaps; /* SVGA_3D_CMD_GENERATE_MIPMAPS */
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/*
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* Guest-backed surface definitions.
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*/
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typedef uint32 SVGAMobId;
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typedef enum SVGAMobFormat {
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SVGA3D_MOBFMT_INVALID = SVGA3D_INVALID_ID,
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SVGA3D_MOBFMT_PTDEPTH_0 = 0,
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SVGA3D_MOBFMT_PTDEPTH_1 = 1,
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SVGA3D_MOBFMT_PTDEPTH_2 = 2,
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SVGA3D_MOBFMT_RANGE = 3,
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SVGA3D_MOBFMT_MAX,
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} SVGAMobFormat;
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/*
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* Sizes of opaque types.
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*/
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#define SVGA3D_OTABLE_MOB_ENTRY_SIZE 16
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#define SVGA3D_OTABLE_CONTEXT_ENTRY_SIZE 8
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#define SVGA3D_OTABLE_SURFACE_ENTRY_SIZE 64
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#define SVGA3D_OTABLE_SHADER_ENTRY_SIZE 16
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#define SVGA3D_CONTEXT_DATA_SIZE 16384
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/*
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* SVGA3dCmdSetOTableBase --
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*
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* This command allows the guest to specify the base PPN of the
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* specified object table.
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*/
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typedef enum {
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SVGA_OTABLE_MOB = 0,
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SVGA_OTABLE_SURFACE = 1,
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SVGA_OTABLE_CONTEXT = 2,
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SVGA_OTABLE_SHADER = 3,
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SVGA_OTABLE_COUNT = 4,
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} SVGAOTableType;
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typedef
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struct {
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SVGAOTableType type;
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PPN baseAddress;
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uint32 sizeInBytes;
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uint32 validSizeInBytes;
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SVGAMobFormat ptDepth;
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} SVGA3dCmdSetOTableBase; /* SVGA_3D_CMD_SET_OTABLE_BASE */
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typedef
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struct {
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SVGAOTableType type;
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} SVGA3dCmdReadbackOTable; /* SVGA_3D_CMD_READBACK_OTABLE */
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/*
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* Define a memory object (Mob) in the OTable.
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*/
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typedef
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struct SVGA3dCmdDefineGBMob {
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SVGAMobId mobid;
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SVGAMobFormat ptDepth;
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PPN base;
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uint32 sizeInBytes;
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} SVGA3dCmdDefineGBMob; /* SVGA_3D_CMD_DEFINE_GB_MOB */
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/*
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* Destroys an object in the OTable.
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*/
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typedef
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struct SVGA3dCmdDestroyGBMob {
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SVGAMobId mobid;
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} SVGA3dCmdDestroyGBMob; /* SVGA_3D_CMD_DESTROY_GB_MOB */
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/*
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* Redefine an object in the OTable.
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*/
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typedef
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struct SVGA3dCmdRedefineGBMob {
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SVGAMobId mobid;
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SVGAMobFormat ptDepth;
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PPN base;
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uint32 sizeInBytes;
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} SVGA3dCmdRedefineGBMob; /* SVGA_3D_CMD_REDEFINE_GB_MOB */
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/*
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* Notification that the page tables have been modified.
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*/
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typedef
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struct SVGA3dCmdUpdateGBMobMapping {
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SVGAMobId mobid;
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} SVGA3dCmdUpdateGBMobMapping; /* SVGA_3D_CMD_UPDATE_GB_MOB_MAPPING */
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/*
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* Define a guest-backed surface.
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*/
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typedef
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struct SVGA3dCmdDefineGBSurface {
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uint32 sid;
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SVGA3dSurfaceFlags surfaceFlags;
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SVGA3dSurfaceFormat format;
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uint32 numMipLevels;
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uint32 multisampleCount;
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SVGA3dTextureFilter autogenFilter;
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SVGA3dSize size;
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} SVGA3dCmdDefineGBSurface; /* SVGA_3D_CMD_DEFINE_GB_SURFACE */
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/*
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* Destroy a guest-backed surface.
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*/
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typedef
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struct SVGA3dCmdDestroyGBSurface {
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uint32 sid;
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} SVGA3dCmdDestroyGBSurface; /* SVGA_3D_CMD_DESTROY_GB_SURFACE */
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/*
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* Bind a guest-backed surface to an object.
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*/
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typedef
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struct SVGA3dCmdBindGBSurface {
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uint32 sid;
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SVGAMobId mobid;
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} SVGA3dCmdBindGBSurface; /* SVGA_3D_CMD_BIND_GB_SURFACE */
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/*
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* Conditionally bind a mob to a guest backed surface if testMobid
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* matches the currently bound mob. Optionally issue a readback on
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* the surface while it is still bound to the old mobid if the mobid
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* is changed by this command.
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*/
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#define SVGA3D_COND_BIND_GB_SURFACE_FLAG_READBACK (1 << 0)
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typedef
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struct{
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uint32 sid;
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SVGAMobId testMobid;
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SVGAMobId mobid;
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uint32 flags;
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}
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SVGA3dCmdCondBindGBSurface; /* SVGA_3D_CMD_COND_BIND_GB_SURFACE */
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/*
|
||||
* Update an image in a guest-backed surface.
|
||||
* (Inform the device that the guest-contents have been updated.)
|
||||
*/
|
||||
|
||||
typedef
|
||||
struct SVGA3dCmdUpdateGBImage {
|
||||
SVGA3dSurfaceImageId image;
|
||||
SVGA3dBox box;
|
||||
} SVGA3dCmdUpdateGBImage; /* SVGA_3D_CMD_UPDATE_GB_IMAGE */
|
||||
|
||||
/*
|
||||
* Update an entire guest-backed surface.
|
||||
* (Inform the device that the guest-contents have been updated.)
|
||||
*/
|
||||
|
||||
typedef
|
||||
struct SVGA3dCmdUpdateGBSurface {
|
||||
uint32 sid;
|
||||
} SVGA3dCmdUpdateGBSurface; /* SVGA_3D_CMD_UPDATE_GB_SURFACE */
|
||||
|
||||
/*
|
||||
* Readback an image in a guest-backed surface.
|
||||
* (Request the device to flush the dirty contents into the guest.)
|
||||
*/
|
||||
|
||||
typedef
|
||||
struct SVGA3dCmdReadbackGBImage {
|
||||
SVGA3dSurfaceImageId image;
|
||||
} SVGA3dCmdReadbackGBImage; /* SVGA_3D_CMD_READBACK_GB_IMAGE*/
|
||||
|
||||
/*
|
||||
* Readback an entire guest-backed surface.
|
||||
* (Request the device to flush the dirty contents into the guest.)
|
||||
*/
|
||||
|
||||
typedef
|
||||
struct SVGA3dCmdReadbackGBSurface {
|
||||
uint32 sid;
|
||||
} SVGA3dCmdReadbackGBSurface; /* SVGA_3D_CMD_READBACK_GB_SURFACE */
|
||||
|
||||
/*
|
||||
* Readback a sub rect of an image in a guest-backed surface. After
|
||||
* issuing this command the driver is required to issue an update call
|
||||
* of the same region before issuing any other commands that reference
|
||||
* this surface or rendering is not guaranteed.
|
||||
*/
|
||||
|
||||
typedef
|
||||
struct SVGA3dCmdReadbackGBImagePartial {
|
||||
SVGA3dSurfaceImageId image;
|
||||
SVGA3dBox box;
|
||||
uint32 invertBox;
|
||||
}
|
||||
SVGA3dCmdReadbackGBImagePartial; /* SVGA_3D_CMD_READBACK_GB_IMAGE_PARTIAL */
|
||||
|
||||
/*
|
||||
* Invalidate an image in a guest-backed surface.
|
||||
* (Notify the device that the contents can be lost.)
|
||||
*/
|
||||
|
||||
typedef
|
||||
struct SVGA3dCmdInvalidateGBImage {
|
||||
SVGA3dSurfaceImageId image;
|
||||
} SVGA3dCmdInvalidateGBImage; /* SVGA_3D_CMD_INVALIDATE_GB_IMAGE */
|
||||
|
||||
/*
|
||||
* Invalidate an entire guest-backed surface.
|
||||
* (Notify the device that the contents if all images can be lost.)
|
||||
*/
|
||||
|
||||
typedef
|
||||
struct SVGA3dCmdInvalidateGBSurface {
|
||||
uint32 sid;
|
||||
} SVGA3dCmdInvalidateGBSurface; /* SVGA_3D_CMD_INVALIDATE_GB_SURFACE */
|
||||
|
||||
/*
|
||||
* Invalidate a sub rect of an image in a guest-backed surface. After
|
||||
* issuing this command the driver is required to issue an update call
|
||||
* of the same region before issuing any other commands that reference
|
||||
* this surface or rendering is not guaranteed.
|
||||
*/
|
||||
|
||||
typedef
|
||||
struct SVGA3dCmdInvalidateGBImagePartial {
|
||||
SVGA3dSurfaceImageId image;
|
||||
SVGA3dBox box;
|
||||
uint32 invertBox;
|
||||
}
|
||||
SVGA3dCmdInvalidateGBImagePartial; /* SVGA_3D_CMD_INVALIDATE_GB_IMAGE_PARTIAL */
|
||||
|
||||
/*
|
||||
* Define a guest-backed context.
|
||||
*/
|
||||
|
||||
typedef
|
||||
struct SVGA3dCmdDefineGBContext {
|
||||
uint32 cid;
|
||||
} SVGA3dCmdDefineGBContext; /* SVGA_3D_CMD_DEFINE_GB_CONTEXT */
|
||||
|
||||
/*
|
||||
* Destroy a guest-backed context.
|
||||
*/
|
||||
|
||||
typedef
|
||||
struct SVGA3dCmdDestroyGBContext {
|
||||
uint32 cid;
|
||||
} SVGA3dCmdDestroyGBContext; /* SVGA_3D_CMD_DESTROY_GB_CONTEXT */
|
||||
|
||||
/*
|
||||
* Bind a guest-backed context.
|
||||
*
|
||||
* validContents should be set to 0 for new contexts,
|
||||
* and 1 if this is an old context which is getting paged
|
||||
* back on to the device.
|
||||
*
|
||||
* For new contexts, it is recommended that the driver
|
||||
* issue commands to initialize all interesting state
|
||||
* prior to rendering.
|
||||
*/
|
||||
|
||||
typedef
|
||||
struct SVGA3dCmdBindGBContext {
|
||||
uint32 cid;
|
||||
SVGAMobId mobid;
|
||||
uint32 validContents;
|
||||
} SVGA3dCmdBindGBContext; /* SVGA_3D_CMD_BIND_GB_CONTEXT */
|
||||
|
||||
/*
|
||||
* Readback a guest-backed context.
|
||||
* (Request that the device flush the contents back into guest memory.)
|
||||
*/
|
||||
|
||||
typedef
|
||||
struct SVGA3dCmdReadbackGBContext {
|
||||
uint32 cid;
|
||||
} SVGA3dCmdReadbackGBContext; /* SVGA_3D_CMD_READBACK_GB_CONTEXT */
|
||||
|
||||
/*
|
||||
* Invalidate a guest-backed context.
|
||||
*/
|
||||
typedef
|
||||
struct SVGA3dCmdInvalidateGBContext {
|
||||
uint32 cid;
|
||||
} SVGA3dCmdInvalidateGBContext; /* SVGA_3D_CMD_INVALIDATE_GB_CONTEXT */
|
||||
|
||||
/*
|
||||
* Define a guest-backed shader.
|
||||
*/
|
||||
|
||||
typedef
|
||||
struct SVGA3dCmdDefineGBShader {
|
||||
uint32 shid;
|
||||
SVGA3dShaderType type;
|
||||
uint32 sizeInBytes;
|
||||
} SVGA3dCmdDefineGBShader; /* SVGA_3D_CMD_DEFINE_GB_SHADER */
|
||||
|
||||
/*
|
||||
* Bind a guest-backed shader.
|
||||
*/
|
||||
|
||||
typedef struct SVGA3dCmdBindGBShader {
|
||||
uint32 shid;
|
||||
SVGAMobId mobid;
|
||||
uint32 offsetInBytes;
|
||||
} SVGA3dCmdBindGBShader; /* SVGA_3D_CMD_BIND_GB_SHADER */
|
||||
|
||||
/*
|
||||
* Destroy a guest-backed shader.
|
||||
*/
|
||||
|
||||
typedef struct SVGA3dCmdDestroyGBShader {
|
||||
uint32 shid;
|
||||
} SVGA3dCmdDestroyGBShader; /* SVGA_3D_CMD_DESTROY_GB_SHADER */
|
||||
|
||||
|
||||
typedef struct SVGA3dCmdBindGBShaderConsts {
|
||||
uint32 cid;
|
||||
SVGA3dShaderType shaderType;
|
||||
SVGA3dShaderConstType shaderConstType;
|
||||
uint32 sid;
|
||||
} SVGA3dCmdBindGBShaderConsts; /* SVGA_3D_CMD_BIND_SHADERCONSTS */
|
||||
|
||||
typedef
|
||||
struct {
|
||||
uint32 cid;
|
||||
uint32 regStart;
|
||||
SVGA3dShaderType shaderType;
|
||||
SVGA3dShaderConstType constType;
|
||||
|
||||
/*
|
||||
* Followed by a variable number of shader constants.
|
||||
*
|
||||
* Note that FLOAT and INT constants are 4-dwords in length, while
|
||||
* BOOL constants are 1-dword in length.
|
||||
*/
|
||||
} SVGA3dCmdSetGBShaderConstInline;
|
||||
/* SVGA_3D_CMD_SET_GB_SHADERCONSTS_INLINE */
|
||||
|
||||
typedef
|
||||
struct {
|
||||
uint32 cid;
|
||||
SVGA3dQueryType type;
|
||||
} SVGA3dCmdBeginGBQuery; /* SVGA_3D_CMD_BEGIN_GB_QUERY */
|
||||
|
||||
typedef
|
||||
struct {
|
||||
uint32 cid;
|
||||
SVGA3dQueryType type;
|
||||
SVGAMobId mobid;
|
||||
uint32 offset;
|
||||
} SVGA3dCmdEndGBQuery; /* SVGA_3D_CMD_END_GB_QUERY */
|
||||
|
||||
|
||||
/*
|
||||
* SVGA_3D_CMD_WAIT_FOR_GB_QUERY --
|
||||
*
|
||||
* The semantics of this command are identical to the
|
||||
* SVGA_3D_CMD_WAIT_FOR_QUERY except that the results are written
|
||||
* to a Mob instead of a GMR.
|
||||
*/
|
||||
|
||||
typedef
|
||||
struct {
|
||||
uint32 cid;
|
||||
SVGA3dQueryType type;
|
||||
SVGAMobId mobid;
|
||||
uint32 offset;
|
||||
} SVGA3dCmdWaitForGBQuery; /* SVGA_3D_CMD_WAIT_FOR_GB_QUERY */
|
||||
|
||||
typedef
|
||||
struct {
|
||||
SVGAMobId mobid;
|
||||
uint32 fbOffset;
|
||||
uint32 initalized;
|
||||
}
|
||||
SVGA3dCmdEnableGart; /* SVGA_3D_CMD_ENABLE_GART */
|
||||
|
||||
typedef
|
||||
struct {
|
||||
SVGAMobId mobid;
|
||||
uint32 gartOffset;
|
||||
}
|
||||
SVGA3dCmdMapMobIntoGart; /* SVGA_3D_CMD_MAP_MOB_INTO_GART */
|
||||
|
||||
|
||||
typedef
|
||||
struct {
|
||||
uint32 gartOffset;
|
||||
uint32 numPages;
|
||||
}
|
||||
SVGA3dCmdUnmapGartRange; /* SVGA_3D_CMD_UNMAP_GART_RANGE */
|
||||
|
||||
|
||||
/*
|
||||
* Screen Targets
|
||||
*/
|
||||
#define SVGA_STFLAG_PRIMARY (1 << 0)
|
||||
|
||||
typedef
|
||||
struct {
|
||||
uint32 stid;
|
||||
uint32 width;
|
||||
uint32 height;
|
||||
int32 xRoot;
|
||||
int32 yRoot;
|
||||
uint32 flags;
|
||||
}
|
||||
SVGA3dCmdDefineGBScreenTarget; /* SVGA_3D_CMD_DEFINE_GB_SCREENTARGET */
|
||||
|
||||
typedef
|
||||
struct {
|
||||
uint32 stid;
|
||||
}
|
||||
SVGA3dCmdDestroyGBScreenTarget; /* SVGA_3D_CMD_DESTROY_GB_SCREENTARGET */
|
||||
|
||||
typedef
|
||||
struct {
|
||||
uint32 stid;
|
||||
SVGA3dSurfaceImageId image;
|
||||
}
|
||||
SVGA3dCmdBindGBScreenTarget; /* SVGA_3D_CMD_BIND_GB_SCREENTARGET */
|
||||
|
||||
typedef
|
||||
struct {
|
||||
uint32 stid;
|
||||
SVGA3dBox box;
|
||||
}
|
||||
SVGA3dCmdUpdateGBScreenTarget; /* SVGA_3D_CMD_UPDATE_GB_SCREENTARGET */
|
||||
|
||||
/*
|
||||
* Capability query index.
|
||||
*
|
||||
|
@ -1879,10 +2484,41 @@ typedef enum {
|
|||
SVGA3D_DEVCAP_SURFACEFMT_BC5_UNORM = 83,
|
||||
|
||||
/*
|
||||
* Don't add new caps into the previous section; the values in this
|
||||
* enumeration must not change. You can put new values right before
|
||||
* SVGA3D_DEVCAP_MAX.
|
||||
* Deprecated.
|
||||
*/
|
||||
SVGA3D_DEVCAP_VGPU10 = 84,
|
||||
|
||||
/*
|
||||
* This contains several SVGA_3D_CAPS_VIDEO_DECODE elements
|
||||
* ored together, one for every type of video decoding supported.
|
||||
*/
|
||||
SVGA3D_DEVCAP_VIDEO_DECODE = 85,
|
||||
|
||||
/*
|
||||
* This contains several SVGA_3D_CAPS_VIDEO_PROCESS elements
|
||||
* ored together, one for every type of video processing supported.
|
||||
*/
|
||||
SVGA3D_DEVCAP_VIDEO_PROCESS = 86,
|
||||
|
||||
SVGA3D_DEVCAP_LINE_AA = 87, /* boolean */
|
||||
SVGA3D_DEVCAP_LINE_STIPPLE = 88, /* boolean */
|
||||
SVGA3D_DEVCAP_MAX_LINE_WIDTH = 89, /* float */
|
||||
SVGA3D_DEVCAP_MAX_AA_LINE_WIDTH = 90, /* float */
|
||||
|
||||
SVGA3D_DEVCAP_SURFACEFMT_YV12 = 91,
|
||||
|
||||
/*
|
||||
* Does the host support the SVGA logic ops commands?
|
||||
*/
|
||||
SVGA3D_DEVCAP_LOGICOPS = 92,
|
||||
|
||||
/*
|
||||
* What support does the host have for screen targets?
|
||||
*
|
||||
* See the SVGA3D_SCREENTARGET_CAP bits below.
|
||||
*/
|
||||
SVGA3D_DEVCAP_SCREENTARGETS = 93,
|
||||
|
||||
SVGA3D_DEVCAP_MAX /* This must be the last index. */
|
||||
} SVGA3dDevCapIndex;
|
||||
|
||||
|
|
Loading…
Reference in New Issue