wil6210: detect HW capabilities
Read relevant information (HW ID for now) once on init and set capabilities accordingly. Signed-off-by: Vladimir Kondratiev <qca_vkondrat@qca.qualcomm.com> Signed-off-by: Kalle Valo <kvalo@codeaurora.org>
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@ -31,6 +31,36 @@ static bool debug_fw; /* = false; */
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module_param(debug_fw, bool, S_IRUGO);
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MODULE_PARM_DESC(debug_fw, " load driver if FW not ready. For FW debug");
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static
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void wil_set_capabilities(struct wil6210_priv *wil)
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{
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u32 rev_id = ioread32(wil->csr + HOSTADDR(RGF_USER_JTAG_DEV_ID));
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bitmap_zero(wil->hw_capabilities, hw_capability_last);
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switch (rev_id) {
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case JTAG_DEV_ID_MARLON_B0:
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wil_info(wil, "Board hardware is Marlon B0\n");
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wil->hw_version = HW_VER_MARLON_B0;
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break;
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case JTAG_DEV_ID_SPARROW_A0:
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wil_info(wil, "Board hardware is Sparrow A0\n");
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wil->hw_version = HW_VER_SPARROW_A0;
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break;
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case JTAG_DEV_ID_SPARROW_A1:
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wil_info(wil, "Board hardware is Sparrow A1\n");
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wil->hw_version = HW_VER_SPARROW_A1;
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break;
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case JTAG_DEV_ID_SPARROW_B0:
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wil_info(wil, "Board hardware is Sparrow B0\n");
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wil->hw_version = HW_VER_SPARROW_B0;
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break;
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default:
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wil_err(wil, "Unknown board hardware 0x%08x\n", rev_id);
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wil->hw_version = HW_VER_UNKNOWN;
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}
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}
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void wil_disable_irq(struct wil6210_priv *wil)
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{
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int irq = wil->pdev->irq;
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@ -205,7 +235,7 @@ static int wil_pcie_probe(struct pci_dev *pdev, const struct pci_device_id *id)
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pci_set_drvdata(pdev, wil);
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wil->pdev = pdev;
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wil->board = board;
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wil_set_capabilities(wil);
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wil6210_clear_irq(wil);
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wil->platform_handle =
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@ -188,6 +188,20 @@ struct RGF_ICR {
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#define RGF_CAF_PLL_LOCK_STATUS (0x88afec)
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#define BIT_CAF_OSC_DIG_XTAL_STABLE BIT(0)
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#define RGF_USER_JTAG_DEV_ID (0x880b34) /* device ID */
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#define JTAG_DEV_ID_MARLON_B0 (0x0612072f)
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#define JTAG_DEV_ID_SPARROW_A0 (0x0632072f)
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#define JTAG_DEV_ID_SPARROW_A1 (0x1632072f)
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#define JTAG_DEV_ID_SPARROW_B0 (0x2632072f)
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enum {
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HW_VER_UNKNOWN,
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HW_VER_MARLON_B0, /* JTAG_DEV_ID_MARLON_B0 */
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HW_VER_SPARROW_A0, /* JTAG_DEV_ID_SPARROW_A0 */
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HW_VER_SPARROW_A1, /* JTAG_DEV_ID_SPARROW_A1 */
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HW_VER_SPARROW_B0, /* JTAG_DEV_ID_SPARROW_B0 */
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};
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/* popular locations */
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#define HOST_MBOX HOSTADDR(RGF_USER_USER_SCRATCH_PAD)
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#define HOST_SW_INT (HOSTADDR(RGF_USER_USER_ICR) + \
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@ -426,6 +440,11 @@ enum {
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fw_recovery_running = 2,
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};
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enum {
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hw_capability_dummy, /* to avoid zero array */
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hw_capability_last
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};
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struct wil_back_rx {
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struct list_head list;
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/* request params, converted to CPU byte order - what we asked for */
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@ -452,6 +471,7 @@ struct wil6210_priv {
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DECLARE_BITMAP(status, wil_status_last);
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u32 fw_version;
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u32 hw_version;
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DECLARE_BITMAP(hw_capabilities, hw_capability_last);
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struct wil_board *board;
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u8 n_mids; /* number of additional MIDs as reported by FW */
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u32 recovery_count; /* num of FW recovery attempts in a short time */
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