Renesas ARM based SoC fixes for v3.11

* Correct GIO3 base addresses for EMEV2 SoC
   - This bug bug added when GPIO support was added for the EMEV2 SoC
     in v3.5
 
 * Correct SCIFB0 resources for r8a77a4 SoC
   - This was a bug was added when SCIF support was added for the r8a77a4 SoC
     in v3.10
 -----BEGIN PGP SIGNATURE-----
 Version: GnuPG v1.4.12 (GNU/Linux)
 
 iQIcBAABAgAGBQJR0lbbAAoJENfPZGlqN0++OWUP/0VlPx8PEWoRbEEC80Lgg/c2
 YMjpxU9XkZSWwyH5NUMBJyYrXHSuSj6Tn9yxTZM6M7nQuQ3YGmhlfQ7QBZOip2BU
 Mlrij4BUSJdhC/GtPdkZ8rm79KqEmeXTIW62l0FvQ1SwgF2TFIlQT+qeli2SZan2
 VjZe0g+WnOQWSlzwQqkpu6uFJZr3SwHrtxSE8Lmx7sVz6wfSbk98gdVOOg4AYQLn
 GMFSwRW4sAOy2yBHyQW36NNY0oY119ioZYgpZmxg0SPd7arCtA5vmrS2PyVKfWbM
 XizuTIhG21i/v/nRHqplbjeb4O8AHqc9bNMqMekr5+ZbysoOxrUrah2yCigQucZL
 /26/b3w3Wxsizzp0osqoEct3+jnVZSXztzrDiSyJbEjs+tLspe9nFCOjFZnZADq2
 2odatr2MI6cleKysjnZsJtVAzZ3LE1fL5FGyFA6pB2AMFAOcAquG2A3OFdu066Kd
 9nMau3dLZCehInrLkkEAyWwB1ywAfXmat06xQlAqd7K0d7YIN0TbNJ+wNEbn6z28
 rLCGdbACSentV6d+Jn9eHixMmIrmsPSnbKzSsjgAeeaDpKbZYSAcsqx9gQ8NNImv
 WqpNEJ27iAGcmhfPo5tIsHHDPcUueqnIzRrqCwry9Lfd8Ra0dqA3fkcBQhC3OSgs
 2fLYRDib/eu2q9f4Z2Id
 =+CUy
 -----END PGP SIGNATURE-----

Merge tag 'renesas-fixes-for-v3.11' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into fixes

Renesas ARM based SoC fixes for v3.11

* Correct GIO3 base addresses for EMEV2 SoC
  - This bug bug added when GPIO support was added for the EMEV2 SoC
    in v3.5

* Correct SCIFB0 resources for r8a77a4 SoC
  - This was a bug was added when SCIF support was added for the r8a77a4 SoC
    in v3.10

* tag 'renesas-fixes-for-v3.11' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas:
  ARM: shmobile: emev2 GIO3 resource fix
  ARM: shmobile: r8a73a4: Fix resources for SCIFB0
This commit is contained in:
Arnd Bergmann 2013-07-03 14:39:34 +02:00
commit d81f58753e
2 changed files with 5 additions and 5 deletions

View File

@ -287,14 +287,14 @@ static struct gpio_em_config gio3_config = {
static struct resource gio3_resources[] = {
[0] = {
.name = "GIO_096",
.start = 0xe0050100,
.end = 0xe005012b,
.start = 0xe0050180,
.end = 0xe00501ab,
.flags = IORESOURCE_MEM,
},
[1] = {
.name = "GIO_096",
.start = 0xe0050140,
.end = 0xe005015f,
.start = 0xe00501c0,
.end = 0xe00501df,
.flags = IORESOURCE_MEM,
},
[2] = {

View File

@ -62,7 +62,7 @@ enum { SCIFA0, SCIFA1, SCIFB0, SCIFB1, SCIFB2, SCIFB3 };
static const struct plat_sci_port scif[] = {
SCIFA_DATA(SCIFA0, 0xe6c40000, gic_spi(144)), /* SCIFA0 */
SCIFA_DATA(SCIFA1, 0xe6c50000, gic_spi(145)), /* SCIFA1 */
SCIFB_DATA(SCIFB0, 0xe6c50000, gic_spi(145)), /* SCIFB0 */
SCIFB_DATA(SCIFB0, 0xe6c20000, gic_spi(148)), /* SCIFB0 */
SCIFB_DATA(SCIFB1, 0xe6c30000, gic_spi(149)), /* SCIFB1 */
SCIFB_DATA(SCIFB2, 0xe6ce0000, gic_spi(150)), /* SCIFB2 */
SCIFB_DATA(SCIFB3, 0xe6cf0000, gic_spi(151)), /* SCIFB3 */