Ux500 DTS changes for the v5.2 kernel cycle.
- This adds the MCDE display controller and some displays. - The Lima MALI-400 driver is added to the kernel, so let's add this block to the Ux500 DTS file. -----BEGIN PGP SIGNATURE----- iQIcBAABAgAGBQJct5oFAAoJEEEQszewGV1zpwsQAJ0pbd2GkXZ0AfmbTr8qgJmn Dy8rxTwI7cmdTI1RnQNANTwvhypZDeslZ6tCb/5KqSE7cC6gSy7c+QaTiWfjSYud NQt/vMrQI+ijOq+shABnk6S4ig2G4WDbCW04cKlWSODbH+bAdJ5LFNkiAeTR0DRm n8OjzottC+jbICz/D4o07yZv/MesmVJziC+i8DnYZlEIWGPCpNHmXGaVi5fOFue0 ty83/C/lKMb///9XNuvTR4X03R+yARb0n54pQ/bo1eECq9zc2qcX6iXEOYiQLHul tHKYY6MC7wEIpPJ4uNDtsFvIeAUsI6RWgtDGbnh8zUecpYKDbwbyV7KOFIMF/NEd eG7ZHaguWhXIcHoYCEyunmUSdVFQJjPk8dfk7M+Fv9wCqihOoGRlyi0mEZCuypEA YTi27mBAUQEWn6Ub1V/vRdILmh2ACBXn5kntJYq4RYofH1FkyuZ8FK5pxb7uV3zy w0fhy2ZZMtAQ5+iD0YyCaehcSE7FR3C7aIPnV5BBXaIRRAZWQUqSP2xGd8hs++J0 /0hSEO2NNg7067XMAJyl4aUjUbO2kBzvX5PeKpm8l6CtRnQLoO0wUFiaInM7IxjC wJWgd2o0ht9ZPNoTCcptSqd7q0zrDnK+kSXjswOEy1Qn77bb5relXEykPoBYwjIv Oe+k3VpboUWbIvpH340D =IT/9 -----END PGP SIGNATURE----- Merge tag 'ux500-dts-v5.2-armsoc' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-stericsson into arm/dt Ux500 DTS changes for the v5.2 kernel cycle. - This adds the MCDE display controller and some displays. - The Lima MALI-400 driver is added to the kernel, so let's add this block to the Ux500 DTS file. * tag 'ux500-dts-v5.2-armsoc' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-stericsson: ARM: dts: Ux500: Add MCDE and Samsung display ARM: dts: ux500: Add Mali-400 Signed-off-by: Olof Johansson <olof@lixom.net>
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commit
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@ -1196,21 +1196,73 @@
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status = "disabled";
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status = "disabled";
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};
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};
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gpu@a0300000 {
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/*
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* This block is referred to as "Smart Graphics Adapter SGA500"
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* in documentation but is in practice a pretty straight-forward
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* MALI-400 GPU block.
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*/
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compatible = "stericsson,db8500-mali", "arm,mali-400";
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reg = <0xa0300000 0x10000>;
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interrupts = <GIC_SPI 115 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 114 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>;
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interrupt-names = "gp",
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"gpmmu",
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"pp0",
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"ppmmu0",
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"combined";
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clocks = <&prcmu_clk PRCMU_ACLK>, <&prcmu_clk PRCMU_SGACLK>;
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clock-names = "bus", "core";
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mali-supply = <&db8500_sga_reg>;
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power-domains = <&pm_domains DOMAIN_VAPE>;
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};
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mcde@a0350000 {
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mcde@a0350000 {
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compatible = "stericsson,mcde";
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compatible = "ste,mcde";
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reg = <0xa0350000 0x1000>, /* MCDE */
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reg = <0xa0350000 0x1000>;
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<0xa0351000 0x1000>, /* DSI link 1 */
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<0xa0352000 0x1000>, /* DSI link 2 */
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<0xa0353000 0x1000>; /* DSI link 3 */
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interrupts = <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>;
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interrupts = <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>;
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epod-supply = <&db8500_b2r2_mcde_reg>;
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vana-supply = <&ab8500_ldo_ana_reg>;
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clocks = <&prcmu_clk PRCMU_MCDECLK>, /* Main MCDE clock */
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clocks = <&prcmu_clk PRCMU_MCDECLK>, /* Main MCDE clock */
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<&prcmu_clk PRCMU_LCDCLK>, /* LCD clock */
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<&prcmu_clk PRCMU_LCDCLK>, /* LCD clock */
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<&prcmu_clk PRCMU_PLLDSI>, /* HDMI clock */
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<&prcmu_clk PRCMU_PLLDSI>; /* HDMI clock */
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<&prcmu_clk PRCMU_DSI0CLK>, /* DSI 0 */
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clock-names = "mcde", "lcd", "hdmi";
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<&prcmu_clk PRCMU_DSI1CLK>, /* DSI 1 */
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#address-cells = <1>;
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<&prcmu_clk PRCMU_DSI0ESCCLK>, /* TVout clock 0 */
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#size-cells = <1>;
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<&prcmu_clk PRCMU_DSI1ESCCLK>, /* TVout clock 1 */
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ranges;
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<&prcmu_clk PRCMU_DSI2ESCCLK>; /* TVout clock 2 */
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status = "disabled";
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dsi0: dsi@a0351000 {
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compatible = "ste,mcde-dsi";
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reg = <0xa0351000 0x1000>;
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vana-supply = <&ab8500_ldo_ana_reg>;
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clocks = <&prcmu_clk PRCMU_DSI0CLK>, <&prcmu_clk PRCMU_DSI0ESCCLK>;
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clock-names = "hs", "lp";
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#address-cells = <1>;
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#size-cells = <0>;
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};
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dsi1: dsi@a0352000 {
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compatible = "ste,mcde-dsi";
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reg = <0xa0352000 0x1000>;
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vana-supply = <&ab8500_ldo_ana_reg>;
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clocks = <&prcmu_clk PRCMU_DSI1CLK>, <&prcmu_clk PRCMU_DSI1ESCCLK>;
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clock-names = "hs", "lp";
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#address-cells = <1>;
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#size-cells = <0>;
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};
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dsi2: dsi@a0353000 {
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compatible = "ste,mcde-dsi";
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reg = <0xa0353000 0x1000>;
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vana-supply = <&ab8500_ldo_ana_reg>;
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/* This DSI port only has the Low Power / Energy Save clock */
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clocks = <&prcmu_clk PRCMU_DSI2ESCCLK>;
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clock-names = "lp";
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#address-cells = <1>;
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#size-cells = <0>;
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};
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};
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};
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cryp@a03cb000 {
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cryp@a03cb000 {
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@ -190,5 +190,18 @@
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};
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};
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};
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};
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};
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};
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mcde@a0350000 {
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status = "okay";
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dsi@a0351000 {
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panel {
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compatible = "samsung,s6d16d0";
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reg = <0>;
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vdd1-supply = <&ab8500_ldo_aux1_reg>;
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reset-gpios = <&gpio2 1 GPIO_ACTIVE_LOW>;
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};
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};
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};
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};
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};
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};
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};
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@ -274,5 +274,18 @@
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};
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};
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};
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};
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};
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};
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mcde@a0350000 {
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status = "okay";
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dsi@a0351000 {
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panel {
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compatible = "samsung,s6d16d0";
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reg = <0>;
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vdd1-supply = <&ab8500_ldo_aux1_reg>;
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reset-gpios = <&gpio2 1 GPIO_ACTIVE_LOW>;
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};
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};
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};
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};
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};
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};
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};
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