drm/i915: Improve long running compute w/a for GuC submission
A workaround was added to the driver to allow compute workloads to run 'forever' by disabling pre-emption on the RCS engine for Gen12. It is not totally unbound as the heartbeat will kick in eventually and cause a reset of the hung engine. However, this does not work well in GuC submission mode. In GuC mode, the pre-emption timeout is how GuC detects hung contexts and triggers a per engine reset. Thus, disabling the timeout means also losing all per engine reset ability. A full GT reset will still occur when the heartbeat finally expires, but that is a much more destructive and undesirable mechanism. The purpose of the workaround is actually to give compute tasks longer to reach a pre-emption point after a pre-emption request has been issued. This is necessary because Gen12 does not support mid-thread pre-emption and compute tasks can have long running threads. So, rather than disabling the timeout completely, just set it to a 'long' value. v2: Review feedback from Tvrtko - must hard code the 'long' value instead of determining it algorithmically. So make it an extra CONFIG definition. Also, remove the execlist centric comment from the existing pre-emption timeout CONFIG option given that it applies to more than just execlists. Signed-off-by: John Harrison <John.C.Harrison@Intel.com> Reviewed-by: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com> Acked-by: Michal Mrozek <michal.mrozek@intel.com> Acked-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20221006213813.1563435-5-John.C.Harrison@Intel.com
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@ -57,10 +57,28 @@ config DRM_I915_PREEMPT_TIMEOUT
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default 640 # milliseconds
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help
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How long to wait (in milliseconds) for a preemption event to occur
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when submitting a new context via execlists. If the current context
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does not hit an arbitration point and yield to HW before the timer
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expires, the HW will be reset to allow the more important context
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to execute.
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when submitting a new context. If the current context does not hit
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an arbitration point and yield to HW before the timer expires, the
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HW will be reset to allow the more important context to execute.
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This is adjustable via
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/sys/class/drm/card?/engine/*/preempt_timeout_ms
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May be 0 to disable the timeout.
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The compiled in default may get overridden at driver probe time on
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certain platforms and certain engines which will be reflected in the
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sysfs control.
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config DRM_I915_PREEMPT_TIMEOUT_COMPUTE
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int "Preempt timeout for compute engines (ms, jiffy granularity)"
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default 7500 # milliseconds
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help
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How long to wait (in milliseconds) for a preemption event to occur
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when submitting a new context to a compute capable engine. If the
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current context does not hit an arbitration point and yield to HW
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before the timer expires, the HW will be reset to allow the more
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important context to execute.
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This is adjustable via
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/sys/class/drm/card?/engine/*/preempt_timeout_ms
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@ -508,9 +508,14 @@ static int intel_engine_setup(struct intel_gt *gt, enum intel_engine_id id,
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engine->props.timeslice_duration_ms =
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CONFIG_DRM_I915_TIMESLICE_DURATION;
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/* Override to uninterruptible for OpenCL workloads. */
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/*
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* Mid-thread pre-emption is not available in Gen12. Unfortunately,
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* some compute workloads run quite long threads. That means they get
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* reset due to not pre-empting in a timely manner. So, bump the
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* pre-emption timeout value to be much higher for compute engines.
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*/
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if (GRAPHICS_VER(i915) == 12 && (engine->flags & I915_ENGINE_HAS_RCS_REG_STATE))
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engine->props.preempt_timeout_ms = 0;
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engine->props.preempt_timeout_ms = CONFIG_DRM_I915_PREEMPT_TIMEOUT_COMPUTE;
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/* Cap properties according to any system limits */
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#define CLAMP_PROP(field) \
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