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arm64: dts: fsl-ls1028a-qds: Drop overlay syntax hard coding 

As suggested by commit 9ae8578b51 ("of: Documentation: change overlay
example to use current syntax"), there is no need to have overlay syntax
be hard coded in the device tree source file any more.

Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Reviewed-by: Vladimir Oltean <vladimir.oltean@nxp.com>
This commit is contained in:
Shawn Guo 2022-01-26 16:49:40 +08:00
parent 708756e197
commit d7a385660e
6 changed files with 348 additions and 452 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

170
arch/arm64/boot/dts/freescale/fsl-ls1028a-qds-13bb.dts
View File

@ -12,102 +12,80 @@
/dts-v1/;
/plugin/;
/ {
fragment@0 {
target = <&mdio_slot1>;
&mdio_slot1 {
#address-cells = <1>;
#size-cells = <0>;
__overlay__ {
#address-cells = <1>;
#size-cells = <0>;
slot1_sgmii: ethernet-phy@2 {
/* AQR112 */
reg = <0x2>;
compatible = "ethernet-phy-ieee802.3-c45";
};
};
};
fragment@1 {
target = <&enetc_port0>;
__overlay__ {
phy-handle = <&slot1_sgmii>;
phy-mode = "usxgmii";
managed = "in-band-status";
status = "okay";
};
};
fragment@2 {
target = <&mdio_slot2>;
__overlay__ {
#address-cells = <1>;
#size-cells = <0>;
/* 4 ports on AQR412 */
slot2_qxgmii0: ethernet-phy@0 {
reg = <0x0>;
compatible = "ethernet-phy-ieee802.3-c45";
};
slot2_qxgmii1: ethernet-phy@1 {
reg = <0x1>;
compatible = "ethernet-phy-ieee802.3-c45";
};
slot2_qxgmii2: ethernet-phy@2 {
reg = <0x2>;
compatible = "ethernet-phy-ieee802.3-c45";
};
slot2_qxgmii3: ethernet-phy@3 {
reg = <0x3>;
compatible = "ethernet-phy-ieee802.3-c45";
};
};
};
fragment@3 {
target = <&mscc_felix_ports>;
__overlay__ {
port@0 {
status = "okay";
phy-handle = <&slot2_qxgmii0>;
phy-mode = "usxgmii";
managed = "in-band-status";
};
port@1 {
status = "okay";
phy-handle = <&slot2_qxgmii1>;
phy-mode = "usxgmii";
managed = "in-band-status";
};
port@2 {
status = "okay";
phy-handle = <&slot2_qxgmii2>;
phy-mode = "usxgmii";
managed = "in-band-status";
};
port@3 {
status = "okay";
phy-handle = <&slot2_qxgmii3>;
phy-mode = "usxgmii";
managed = "in-band-status";
};
};
};
fragment@4 {
target = <&mscc_felix>;
__overlay__ {
status = "okay";
};
slot1_sgmii: ethernet-phy@2 {
/* AQR112 */
reg = <0x2>;
compatible = "ethernet-phy-ieee802.3-c45";
};
};
&enetc_port0 {
phy-handle = <&slot1_sgmii>;
phy-mode = "usxgmii";
managed = "in-band-status";
status = "okay";
};
&mdio_slot2 {
#address-cells = <1>;
#size-cells = <0>;
/* 4 ports on AQR412 */
slot2_qxgmii0: ethernet-phy@0 {
reg = <0x0>;
compatible = "ethernet-phy-ieee802.3-c45";
};
slot2_qxgmii1: ethernet-phy@1 {
reg = <0x1>;
compatible = "ethernet-phy-ieee802.3-c45";
};
slot2_qxgmii2: ethernet-phy@2 {
reg = <0x2>;
compatible = "ethernet-phy-ieee802.3-c45";
};
slot2_qxgmii3: ethernet-phy@3 {
reg = <0x3>;
compatible = "ethernet-phy-ieee802.3-c45";
};
};
&mscc_felix_ports {
port@0 {
status = "okay";
phy-handle = <&slot2_qxgmii0>;
phy-mode = "usxgmii";
managed = "in-band-status";
};
port@1 {
status = "okay";
phy-handle = <&slot2_qxgmii1>;
phy-mode = "usxgmii";
managed = "in-band-status";
};
port@2 {
status = "okay";
phy-handle = <&slot2_qxgmii2>;
phy-mode = "usxgmii";
managed = "in-band-status";
};
port@3 {
status = "okay";
phy-handle = <&slot2_qxgmii3>;
phy-mode = "usxgmii";
managed = "in-band-status";
};
};
&mscc_felix {
status = "okay";
};

162
arch/arm64/boot/dts/freescale/fsl-ls1028a-qds-65bb.dts
View File

@ -11,98 +11,76 @@
/dts-v1/;
/plugin/;
/ {
fragment@0 {
target = <&mdio_slot1>;
&mdio_slot1 {
#address-cells = <1>;
#size-cells = <0>;
__overlay__ {
#address-cells = <1>;
#size-cells = <0>;
slot1_sgmii: ethernet-phy@2 {
/* AQR112 */
reg = <0x2>;
compatible = "ethernet-phy-ieee802.3-c45";
};
};
};
fragment@1 {
target = <&enetc_port0>;
__overlay__ {
phy-handle = <&slot1_sgmii>;
phy-mode = "2500base-x";
managed = "in-band-status";
status = "okay";
};
};
fragment@2 {
target = <&mdio_slot2>;
__overlay__ {
#address-cells = <1>;
#size-cells = <0>;
/* 4 ports on VSC8514 */
slot2_qsgmii0: ethernet-phy@8 {
reg = <0x8>;
};
slot2_qsgmii1: ethernet-phy@9 {
reg = <0x9>;
};
slot2_qsgmii2: ethernet-phy@a {
reg = <0xa>;
};
slot2_qsgmii3: ethernet-phy@b {
reg = <0xb>;
};
};
};
fragment@3 {
target = <&mscc_felix_ports>;
__overlay__ {
port@0 {
status = "okay";
phy-handle = <&slot2_qsgmii0>;
phy-mode = "qsgmii";
managed = "in-band-status";
};
port@1 {
status = "okay";
phy-handle = <&slot2_qsgmii1>;
phy-mode = "qsgmii";
managed = "in-band-status";
};
port@2 {
status = "okay";
phy-handle = <&slot2_qsgmii2>;
phy-mode = "qsgmii";
managed = "in-band-status";
};
port@3 {
status = "okay";
phy-handle = <&slot2_qsgmii3>;
phy-mode = "qsgmii";
managed = "in-band-status";
};
};
};
fragment@4 {
target = <&mscc_felix>;
__overlay__ {
status = "okay";
};
slot1_sgmii: ethernet-phy@2 {
/* AQR112 */
reg = <0x2>;
compatible = "ethernet-phy-ieee802.3-c45";
};
};
&enetc_port0 {
phy-handle = <&slot1_sgmii>;
phy-mode = "2500base-x";
managed = "in-band-status";
status = "okay";
};
&mdio_slot2 {
#address-cells = <1>;
#size-cells = <0>;
/* 4 ports on VSC8514 */
slot2_qsgmii0: ethernet-phy@8 {
reg = <0x8>;
};
slot2_qsgmii1: ethernet-phy@9 {
reg = <0x9>;
};
slot2_qsgmii2: ethernet-phy@a {
reg = <0xa>;
};
slot2_qsgmii3: ethernet-phy@b {
reg = <0xb>;
};
};
&mscc_felix_ports {
port@0 {
status = "okay";
phy-handle = <&slot2_qsgmii0>;
phy-mode = "qsgmii";
managed = "in-band-status";
};
port@1 {
status = "okay";
phy-handle = <&slot2_qsgmii1>;
phy-mode = "qsgmii";
managed = "in-band-status";
};
port@2 {
status = "okay";
phy-handle = <&slot2_qsgmii2>;
phy-mode = "qsgmii";
managed = "in-band-status";
};
port@3 {
status = "okay";
phy-handle = <&slot2_qsgmii3>;
phy-mode = "qsgmii";
managed = "in-band-status";
};
};
&mscc_felix {
status = "okay";
};

109
arch/arm64/boot/dts/freescale/fsl-ls1028a-qds-7777.dts
View File

@ -12,71 +12,58 @@
/dts-v1/;
/plugin/;
/ {
fragment@0 {
target = <&mdio_slot1>;
&mdio_slot1 {
#address-cells = <1>;
#size-cells = <0>;
__overlay__ {
#address-cells = <1>;
#size-cells = <0>;
/* 4 ports on AQR412 */
slot1_sxgmii0: ethernet-phy@0 {
reg = <0x0>;
compatible = "ethernet-phy-ieee802.3-c45";
};
slot1_sxgmii1: ethernet-phy@1 {
reg = <0x1>;
compatible = "ethernet-phy-ieee802.3-c45";
};
slot1_sxgmii2: ethernet-phy@2 {
reg = <0x2>;
compatible = "ethernet-phy-ieee802.3-c45";
};
slot1_sxgmii3: ethernet-phy@3 {
reg = <0x3>;
compatible = "ethernet-phy-ieee802.3-c45";
};
};
/* 4 ports on AQR412 */
slot1_sxgmii0: ethernet-phy@0 {
reg = <0x0>;
compatible = "ethernet-phy-ieee802.3-c45";
};
fragment@1 {
target = <&mscc_felix_ports>;
__overlay__ {
port@0 {
status = "okay";
phy-handle = <&slot1_sxgmii0>;
phy-mode = "2500base-x";
};
port@1 {
status = "okay";
phy-handle = <&slot1_sxgmii1>;
phy-mode = "2500base-x";
};
port@2 {
status = "okay";
phy-handle = <&slot1_sxgmii2>;
phy-mode = "2500base-x";
};
port@3 {
status = "okay";
phy-handle = <&slot1_sxgmii3>;
phy-mode = "2500base-x";
};
};
slot1_sxgmii1: ethernet-phy@1 {
reg = <0x1>;
compatible = "ethernet-phy-ieee802.3-c45";
};
fragment@2 {
target = <&mscc_felix>;
__overlay__ {
status = "okay";
};
slot1_sxgmii2: ethernet-phy@2 {
reg = <0x2>;
compatible = "ethernet-phy-ieee802.3-c45";
};
slot1_sxgmii3: ethernet-phy@3 {
reg = <0x3>;
compatible = "ethernet-phy-ieee802.3-c45";
};
};
&mscc_felix_ports {
port@0 {
status = "okay";
phy-handle = <&slot1_sxgmii0>;
phy-mode = "2500base-x";
};
port@1 {
status = "okay";
phy-handle = <&slot1_sxgmii1>;
phy-mode = "2500base-x";
};
port@2 {
status = "okay";
phy-handle = <&slot1_sxgmii2>;
phy-mode = "2500base-x";
};
port@3 {
status = "okay";
phy-handle = <&slot1_sxgmii3>;
phy-mode = "2500base-x";
};
};
&mscc_felix {
status = "okay";
};

160
arch/arm64/boot/dts/freescale/fsl-ls1028a-qds-85bb.dts
View File

@ -11,97 +11,75 @@
/dts-v1/;
/plugin/;
/ {
fragment@0 {
target = <&mdio_slot1>;
&mdio_slot1 {
#address-cells = <1>;
#size-cells = <0>;
__overlay__ {
#address-cells = <1>;
#size-cells = <0>;
slot1_sgmii: ethernet-phy@1c {
/* 1st port on VSC8234 */
reg = <0x1c>;
};
};
};
fragment@1 {
target = <&enetc_port0>;
__overlay__ {
phy-handle = <&slot1_sgmii>;
phy-mode = "sgmii";
managed = "in-band-status";
status = "okay";
};
};
fragment@2 {
target = <&mdio_slot2>;
__overlay__ {
#address-cells = <1>;
#size-cells = <0>;
/* 4 ports on VSC8514 */
slot2_qsgmii0: ethernet-phy@8 {
reg = <0x8>;
};
slot2_qsgmii1: ethernet-phy@9 {
reg = <0x9>;
};
slot2_qsgmii2: ethernet-phy@a {
reg = <0xa>;
};
slot2_qsgmii3: ethernet-phy@b {
reg = <0xb>;
};
};
};
fragment@3 {
target = <&mscc_felix_ports>;
__overlay__ {
port@0 {
status = "okay";
phy-handle = <&slot2_qsgmii0>;
phy-mode = "qsgmii";
managed = "in-band-status";
};
port@1 {
status = "okay";
phy-handle = <&slot2_qsgmii1>;
phy-mode = "qsgmii";
managed = "in-band-status";
};
port@2 {
status = "okay";
phy-handle = <&slot2_qsgmii2>;
phy-mode = "qsgmii";
managed = "in-band-status";
};
port@3 {
status = "okay";
phy-handle = <&slot2_qsgmii3>;
phy-mode = "qsgmii";
managed = "in-band-status";
};
};
};
fragment@4 {
target = <&mscc_felix>;
__overlay__ {
status = "okay";
};
slot1_sgmii: ethernet-phy@1c {
/* 1st port on VSC8234 */
reg = <0x1c>;
};
};
&enetc_port0 {
phy-handle = <&slot1_sgmii>;
phy-mode = "sgmii";
managed = "in-band-status";
status = "okay";
};
&mdio_slot2 {
#address-cells = <1>;
#size-cells = <0>;
/* 4 ports on VSC8514 */
slot2_qsgmii0: ethernet-phy@8 {
reg = <0x8>;
};
slot2_qsgmii1: ethernet-phy@9 {
reg = <0x9>;
};
slot2_qsgmii2: ethernet-phy@a {
reg = <0xa>;
};
slot2_qsgmii3: ethernet-phy@b {
reg = <0xb>;
};
};
&mscc_felix_ports {
port@0 {
status = "okay";
phy-handle = <&slot2_qsgmii0>;
phy-mode = "qsgmii";
managed = "in-band-status";
};
port@1 {
status = "okay";
phy-handle = <&slot2_qsgmii1>;
phy-mode = "qsgmii";
managed = "in-band-status";
};
port@2 {
status = "okay";
phy-handle = <&slot2_qsgmii2>;
phy-mode = "qsgmii";
managed = "in-band-status";
};
port@3 {
status = "okay";
phy-handle = <&slot2_qsgmii3>;
phy-mode = "qsgmii";
managed = "in-band-status";
};
};
&mscc_felix {
status = "okay";
};

92
arch/arm64/boot/dts/freescale/fsl-ls1028a-qds-899b.dts
View File

@ -11,65 +11,51 @@
/dts-v1/;
/plugin/;
/ {
fragment@0 {
target = <&mdio_slot1>;
__overlay__ {
#address-cells = <1>;
#size-cells = <0>;
&mdio_slot1 {
#address-cells = <1>;
#size-cells = <0>;
/* VSC8234 */
slot1_sgmii0: ethernet-phy@1c {
reg = <0x1c>;
};
slot1_sgmii1: ethernet-phy@1d {
reg = <0x1d>;
};
slot1_sgmii2: ethernet-phy@1e {
reg = <0x1e>;
};
slot1_sgmii3: ethernet-phy@1f {
reg = <0x1f>;
};
};
/* VSC8234 */
slot1_sgmii0: ethernet-phy@1c {
reg = <0x1c>;
};
fragment@1 {
target = <&enetc_port0>;
__overlay__ {
phy-handle = <&slot1_sgmii0>;
phy-mode = "sgmii";
managed = "in-band-status";
status = "okay";
};
slot1_sgmii1: ethernet-phy@1d {
reg = <0x1d>;
};
fragment@2 {
target = <&mscc_felix_ports>;
__overlay__ {
port@1 {
status = "okay";
phy-handle = <&slot1_sgmii1>;
phy-mode = "sgmii";
managed = "in-band-status";
};
port@2 {
status = "okay";
phy-handle = <&slot1_sgmii2>;
phy-mode = "sgmii";
managed = "in-band-status";
};
};
slot1_sgmii2: ethernet-phy@1e {
reg = <0x1e>;
};
fragment@3 {
target = <&mscc_felix>;
__overlay__ {
status = "okay";
};
slot1_sgmii3: ethernet-phy@1f {
reg = <0x1f>;
};
};
&enetc_port0 {
phy-handle = <&slot1_sgmii0>;
phy-mode = "sgmii";
managed = "in-band-status";
status = "okay";
};
&mscc_felix_ports {
port@1 {
status = "okay";
phy-handle = <&slot1_sgmii1>;
phy-mode = "sgmii";
managed = "in-band-status";
};
port@2 {
status = "okay";
phy-handle = <&slot1_sgmii2>;
phy-mode = "sgmii";
managed = "in-band-status";
};
};
&mscc_felix {
status = "okay";
};

107
arch/arm64/boot/dts/freescale/fsl-ls1028a-qds-9999.dts
View File

@ -11,69 +11,58 @@
/dts-v1/;
/plugin/;
/ {
fragment@0 {
target = <&mdio_slot1>;
__overlay__ {
#address-cells = <1>;
#size-cells = <0>;
&mdio_slot1 {
#address-cells = <1>;
#size-cells = <0>;
/* VSC8234 */
slot1_sgmii0: ethernet-phy@1c {
reg = <0x1c>;
};
slot1_sgmii1: ethernet-phy@1d {
reg = <0x1d>;
};
slot1_sgmii2: ethernet-phy@1e {
reg = <0x1e>;
};
slot1_sgmii3: ethernet-phy@1f {
reg = <0x1f>;
};
};
/* VSC8234 */
slot1_sgmii0: ethernet-phy@1c {
reg = <0x1c>;
};
fragment@1 {
target = <&mscc_felix_ports>;
__overlay__ {
port@0 {
status = "okay";
phy-handle = <&slot1_sgmii0>;
phy-mode = "sgmii";
managed = "in-band-status";
};
port@1 {
status = "okay";
phy-handle = <&slot1_sgmii1>;
phy-mode = "sgmii";
managed = "in-band-status";
};
port@2 {
status = "okay";
phy-handle = <&slot1_sgmii2>;
phy-mode = "sgmii";
managed = "in-band-status";
};
port@3 {
status = "okay";
phy-handle = <&slot1_sgmii3>;
phy-mode = "sgmii";
managed = "in-band-status";
};
};
slot1_sgmii1: ethernet-phy@1d {
reg = <0x1d>;
};
fragment@2 {
target = <&mscc_felix>;
__overlay__ {
status = "okay";
};
slot1_sgmii2: ethernet-phy@1e {
reg = <0x1e>;
};
slot1_sgmii3: ethernet-phy@1f {
reg = <0x1f>;
};
};
&mscc_felix_ports {
port@0 {
status = "okay";
phy-handle = <&slot1_sgmii0>;
phy-mode = "sgmii";
managed = "in-band-status";
};
port@1 {
status = "okay";
phy-handle = <&slot1_sgmii1>;
phy-mode = "sgmii";
managed = "in-band-status";
};
port@2 {
status = "okay";
phy-handle = <&slot1_sgmii2>;
phy-mode = "sgmii";
managed = "in-band-status";
};
port@3 {
status = "okay";
phy-handle = <&slot1_sgmii3>;
phy-mode = "sgmii";
managed = "in-band-status";
};
};
&mscc_felix {
status = "okay";
};