iio: adc: stm32-adc: convert to device properties
Make the conversion to firmware agnostic device properties. As part of the conversion the IIO inkern interface 'of_xlate()' is also converted to 'fwnode_xlate()'. The goal is to completely drop 'of_xlate' and hence OF dependencies from IIO. Signed-off-by: Nuno Sá <nuno.sa@analog.com> Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com> Reviewed-by: Fabrice Gasnier <fabrice.gasnier@foss.st.com> Tested-by: Fabrice Gasnier <fabrice.gasnier@foss.st.com> Link: https://lore.kernel.org/r/20220715122903.332535-14-nuno.sa@analog.com Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
This commit is contained in:
Nuno Sá
Jonathan Cameron
parent
4f47a236a2
commit
d7705f3544
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@ -21,11 +21,11 @@
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#include <linux/io.h>
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#include <linux/iopoll.h>
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#include <linux/module.h>
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#include <linux/mod_devicetable.h>
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#include <linux/nvmem-consumer.h>
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#include <linux/platform_device.h>
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#include <linux/pm_runtime.h>
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#include <linux/of.h>
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#include <linux/of_device.h>
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#include <linux/property.h>
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#include "stm32-adc-core.h"
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@ -241,6 +241,7 @@ struct stm32_adc_cfg {
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* @chan_name: channel name array
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* @num_diff: number of differential channels
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* @int_ch: internal channel indexes array
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* @nsmps: number of channels with optional sample time
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*/
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struct stm32_adc {
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struct stm32_adc_common *common;
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@ -267,6 +268,7 @@ struct stm32_adc {
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char chan_name[STM32_ADC_CH_MAX][STM32_ADC_CH_SZ];
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u32 num_diff;
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int int_ch[STM32_ADC_INT_CH_NB];
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int nsmps;
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};
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struct stm32_adc_diff_channel {
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@ -1520,8 +1522,8 @@ static int stm32_adc_update_scan_mode(struct iio_dev *indio_dev,
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return ret;
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}
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static int stm32_adc_of_xlate(struct iio_dev *indio_dev,
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const struct of_phandle_args *iiospec)
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static int stm32_adc_fwnode_xlate(struct iio_dev *indio_dev,
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const struct fwnode_reference_args *iiospec)
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{
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int i;
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@ -1575,7 +1577,7 @@ static const struct iio_info stm32_adc_iio_info = {
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.hwfifo_set_watermark = stm32_adc_set_watermark,
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.update_scan_mode = stm32_adc_update_scan_mode,
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.debugfs_reg_access = stm32_adc_debugfs_reg_access,
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.of_xlate = stm32_adc_of_xlate,
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.fwnode_xlate = stm32_adc_fwnode_xlate,
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};
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static unsigned int stm32_adc_dma_residue(struct stm32_adc *adc)
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@ -1772,14 +1774,14 @@ static const struct iio_chan_spec_ext_info stm32_adc_ext_info[] = {
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{},
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};
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static int stm32_adc_of_get_resolution(struct iio_dev *indio_dev)
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static int stm32_adc_fw_get_resolution(struct iio_dev *indio_dev)
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{
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struct device_node *node = indio_dev->dev.of_node;
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struct device *dev = &indio_dev->dev;
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struct stm32_adc *adc = iio_priv(indio_dev);
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unsigned int i;
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u32 res;
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if (of_property_read_u32(node, "assigned-resolution-bits", &res))
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if (device_property_read_u32(dev, "assigned-resolution-bits", &res))
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res = adc->cfg->adc_info->resolutions[0];
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for (i = 0; i < adc->cfg->adc_info->num_res; i++)
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@ -1863,11 +1865,11 @@ static void stm32_adc_chan_init_one(struct iio_dev *indio_dev,
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static int stm32_adc_get_legacy_chan_count(struct iio_dev *indio_dev, struct stm32_adc *adc)
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{
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struct device_node *node = indio_dev->dev.of_node;
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struct device *dev = &indio_dev->dev;
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const struct stm32_adc_info *adc_info = adc->cfg->adc_info;
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int num_channels = 0, ret;
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ret = of_property_count_u32_elems(node, "st,adc-channels");
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ret = device_property_count_u32(dev, "st,adc-channels");
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if (ret > adc_info->max_channels) {
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dev_err(&indio_dev->dev, "Bad st,adc-channels?\n");
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return -EINVAL;
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@ -1875,8 +1877,15 @@ static int stm32_adc_get_legacy_chan_count(struct iio_dev *indio_dev, struct stm
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num_channels += ret;
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}
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ret = of_property_count_elems_of_size(node, "st,adc-diff-channels",
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sizeof(struct stm32_adc_diff_channel));
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/*
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* each st,adc-diff-channels is a group of 2 u32 so we divide @ret
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* to get the *real* number of channels.
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*/
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ret = device_property_count_u32(dev, "st,adc-diff-channels");
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if (ret < 0)
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return ret;
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ret /= (int)(sizeof(struct stm32_adc_diff_channel) / sizeof(u32));
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if (ret > adc_info->max_channels) {
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dev_err(&indio_dev->dev, "Bad st,adc-diff-channels?\n");
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return -EINVAL;
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@ -1886,8 +1895,8 @@ static int stm32_adc_get_legacy_chan_count(struct iio_dev *indio_dev, struct stm
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}
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/* Optional sample time is provided either for each, or all channels */
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ret = of_property_count_u32_elems(node, "st,min-sample-time-nsecs");
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if (ret > 1 && ret != num_channels) {
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adc->nsmps = device_property_count_u32(dev, "st,min-sample-time-nsecs");
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if (adc->nsmps > 1 && adc->nsmps != num_channels) {
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dev_err(&indio_dev->dev, "Invalid st,min-sample-time-nsecs\n");
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return -EINVAL;
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}
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@ -1897,21 +1906,20 @@ static int stm32_adc_get_legacy_chan_count(struct iio_dev *indio_dev, struct stm
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static int stm32_adc_legacy_chan_init(struct iio_dev *indio_dev,
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struct stm32_adc *adc,
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struct iio_chan_spec *channels)
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struct iio_chan_spec *channels,
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int nchans)
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{
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struct device_node *node = indio_dev->dev.of_node;
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const struct stm32_adc_info *adc_info = adc->cfg->adc_info;
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struct stm32_adc_diff_channel diff[STM32_ADC_CH_MAX];
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struct device *dev = &indio_dev->dev;
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u32 num_diff = adc->num_diff;
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int size = num_diff * sizeof(*diff) / sizeof(u32);
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int scan_index = 0, val, ret, i;
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struct property *prop;
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const __be32 *cur;
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u32 smp = 0;
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int scan_index = 0, ret, i, c;
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u32 smp = 0, smps[STM32_ADC_CH_MAX], chans[STM32_ADC_CH_MAX];
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if (num_diff) {
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ret = of_property_read_u32_array(node, "st,adc-diff-channels",
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(u32 *)diff, size);
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ret = device_property_read_u32_array(dev, "st,adc-diff-channels",
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(u32 *)diff, size);
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if (ret) {
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dev_err(&indio_dev->dev, "Failed to get diff channels %d\n", ret);
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return ret;
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@ -1932,32 +1940,47 @@ static int stm32_adc_legacy_chan_init(struct iio_dev *indio_dev,
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}
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}
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of_property_for_each_u32(node, "st,adc-channels", prop, cur, val) {
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if (val >= adc_info->max_channels) {
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dev_err(&indio_dev->dev, "Invalid channel %d\n", val);
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ret = device_property_read_u32_array(dev, "st,adc-channels", chans,
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nchans);
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if (ret)
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return ret;
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for (c = 0; c < nchans; c++) {
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if (chans[c] >= adc_info->max_channels) {
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dev_err(&indio_dev->dev, "Invalid channel %d\n",
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chans[c]);
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return -EINVAL;
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}
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/* Channel can't be configured both as single-ended & diff */
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for (i = 0; i < num_diff; i++) {
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if (val == diff[i].vinp) {
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dev_err(&indio_dev->dev, "channel %d misconfigured\n", val);
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if (chans[c] == diff[i].vinp) {
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dev_err(&indio_dev->dev, "channel %d misconfigured\n", chans[c]);
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return -EINVAL;
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}
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}
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stm32_adc_chan_init_one(indio_dev, &channels[scan_index], val,
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0, scan_index, false);
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stm32_adc_chan_init_one(indio_dev, &channels[scan_index],
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chans[c], 0, scan_index, false);
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scan_index++;
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}
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if (adc->nsmps > 0) {
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ret = device_property_read_u32_array(dev, "st,min-sample-time-nsecs",
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smps, adc->nsmps);
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if (ret)
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return ret;
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}
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for (i = 0; i < scan_index; i++) {
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/*
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* Using of_property_read_u32_index(), smp value will only be
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* modified if valid u32 value can be decoded. This allows to
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* get either no value, 1 shared value for all indexes, or one
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* value per channel.
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* This check is used with the above logic so that smp value
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* will only be modified if valid u32 value can be decoded. This
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* allows to get either no value, 1 shared value for all indexes,
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* or one value per channel. The point is to have the same
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* behavior as 'of_property_read_u32_index()'.
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*/
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of_property_read_u32_index(node, "st,min-sample-time-nsecs", i, &smp);
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if (i < adc->nsmps)
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smp = smps[i];
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/* Prepare sampling time settings */
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stm32_adc_smpr_init(adc, channels[i].channel, smp);
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@ -2005,22 +2028,21 @@ static int stm32_adc_generic_chan_init(struct iio_dev *indio_dev,
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struct stm32_adc *adc,
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struct iio_chan_spec *channels)
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{
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struct device_node *node = indio_dev->dev.of_node;
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const struct stm32_adc_info *adc_info = adc->cfg->adc_info;
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struct device_node *child;
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struct fwnode_handle *child;
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const char *name;
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int val, scan_index = 0, ret;
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bool differential;
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u32 vin[2];
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for_each_available_child_of_node(node, child) {
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ret = of_property_read_u32(child, "reg", &val);
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device_for_each_child_node(&indio_dev->dev, child) {
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ret = fwnode_property_read_u32(child, "reg", &val);
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if (ret) {
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dev_err(&indio_dev->dev, "Missing channel index %d\n", ret);
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goto err;
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}
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ret = of_property_read_string(child, "label", &name);
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ret = fwnode_property_read_string(child, "label", &name);
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/* label is optional */
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if (!ret) {
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if (strlen(name) >= STM32_ADC_CH_SZ) {
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@ -2047,7 +2069,7 @@ static int stm32_adc_generic_chan_init(struct iio_dev *indio_dev,
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}
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differential = false;
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ret = of_property_read_u32_array(child, "diff-channels", vin, 2);
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ret = fwnode_property_read_u32_array(child, "diff-channels", vin, 2);
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/* diff-channels is optional */
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if (!ret) {
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differential = true;
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@ -2064,7 +2086,7 @@ static int stm32_adc_generic_chan_init(struct iio_dev *indio_dev,
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stm32_adc_chan_init_one(indio_dev, &channels[scan_index], val,
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vin[1], scan_index, differential);
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ret = of_property_read_u32(child, "st,min-sample-time-ns", &val);
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ret = fwnode_property_read_u32(child, "st,min-sample-time-ns", &val);
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/* st,min-sample-time-ns is optional */
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if (!ret) {
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stm32_adc_smpr_init(adc, channels[scan_index].channel, val);
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@ -2082,14 +2104,13 @@ static int stm32_adc_generic_chan_init(struct iio_dev *indio_dev,
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return scan_index;
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err:
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of_node_put(child);
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fwnode_handle_put(child);
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return ret;
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}
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static int stm32_adc_chan_of_init(struct iio_dev *indio_dev, bool timestamping)
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static int stm32_adc_chan_fw_init(struct iio_dev *indio_dev, bool timestamping)
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{
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struct device_node *node = indio_dev->dev.of_node;
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struct stm32_adc *adc = iio_priv(indio_dev);
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const struct stm32_adc_info *adc_info = adc->cfg->adc_info;
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struct iio_chan_spec *channels;
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@ -2099,7 +2120,7 @@ static int stm32_adc_chan_of_init(struct iio_dev *indio_dev, bool timestamping)
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for (i = 0; i < STM32_ADC_INT_CH_NB; i++)
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adc->int_ch[i] = STM32_ADC_INT_CH_NONE;
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num_channels = of_get_available_child_count(node);
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num_channels = device_get_child_node_count(&indio_dev->dev);
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/* If no channels have been found, fallback to channels legacy properties. */
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if (!num_channels) {
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legacy = true;
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@ -2130,7 +2151,8 @@ static int stm32_adc_chan_of_init(struct iio_dev *indio_dev, bool timestamping)
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return -ENOMEM;
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if (legacy)
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ret = stm32_adc_legacy_chan_init(indio_dev, adc, channels);
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ret = stm32_adc_legacy_chan_init(indio_dev, adc, channels,
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num_channels);
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else
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ret = stm32_adc_generic_chan_init(indio_dev, adc, channels);
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if (ret < 0)
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@ -2212,9 +2234,6 @@ static int stm32_adc_probe(struct platform_device *pdev)
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bool timestamping = false;
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int ret;
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if (!pdev->dev.of_node)
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return -ENODEV;
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indio_dev = devm_iio_device_alloc(&pdev->dev, sizeof(*adc));
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if (!indio_dev)
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return -ENOMEM;
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@ -2223,17 +2242,16 @@ static int stm32_adc_probe(struct platform_device *pdev)
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adc->common = dev_get_drvdata(pdev->dev.parent);
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spin_lock_init(&adc->lock);
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init_completion(&adc->completion);
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adc->cfg = (const struct stm32_adc_cfg *)
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of_match_device(dev->driver->of_match_table, dev)->data;
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adc->cfg = device_get_match_data(dev);
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indio_dev->name = dev_name(&pdev->dev);
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indio_dev->dev.of_node = pdev->dev.of_node;
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device_set_node(&indio_dev->dev, dev_fwnode(&pdev->dev));
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indio_dev->info = &stm32_adc_iio_info;
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indio_dev->modes = INDIO_DIRECT_MODE | INDIO_HARDWARE_TRIGGERED;
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platform_set_drvdata(pdev, indio_dev);
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ret = of_property_read_u32(pdev->dev.of_node, "reg", &adc->offset);
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ret = device_property_read_u32(dev, "reg", &adc->offset);
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if (ret != 0) {
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dev_err(&pdev->dev, "missing reg property\n");
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return -EINVAL;
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@ -2262,7 +2280,7 @@ static int stm32_adc_probe(struct platform_device *pdev)
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}
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}
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ret = stm32_adc_of_get_resolution(indio_dev);
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ret = stm32_adc_fw_get_resolution(indio_dev);
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if (ret < 0)
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return ret;
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@ -2279,7 +2297,7 @@ static int stm32_adc_probe(struct platform_device *pdev)
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timestamping = true;
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}
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ret = stm32_adc_chan_of_init(indio_dev, timestamping);
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ret = stm32_adc_chan_fw_init(indio_dev, timestamping);
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if (ret < 0)
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goto err_dma_disable;
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