x86: coding style fixes to arch/x86/kernel/cpu/mcheck/mce_32.c
Before: total: 10 errors, 3 warnings, 90 lines checked After: total: 0 errors, 3 warnings, 90 lines checked No code changed: arch/x86/kernel/cpu/mcheck/mce_32.o: text data bss dec hex filename 287 42 12 341 155 mce_32.o.before 287 42 12 341 155 mce_32.o.after md5: fede5ff8e6bc3f62e8e691ca6c45eb39 mce_32.o.before.asm fede5ff8e6bc3f62e8e691ca6c45eb39 mce_32.o.after.asm Signed-off-by: Paolo Ciarrocchi <paolo.ciarrocchi@gmail.com> Signed-off-by: Ingo Molnar <mingo@elte.hu>
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@ -10,20 +10,20 @@
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#include <linux/smp.h>
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#include <linux/thread_info.h>
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#include <asm/processor.h>
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#include <asm/processor.h>
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#include <asm/system.h>
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#include <asm/mce.h>
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#include "mce.h"
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int mce_disabled = 0;
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int mce_disabled;
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int nr_mce_banks;
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EXPORT_SYMBOL_GPL(nr_mce_banks); /* non-fatal.o */
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/* Handle unconfigured int18 (should never happen) */
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static void unexpected_machine_check(struct pt_regs * regs, long error_code)
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{
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static void unexpected_machine_check(struct pt_regs *regs, long error_code)
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{
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printk(KERN_ERR "CPU#%d: Unexpected int18 (Machine Check).\n", smp_processor_id());
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}
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@ -33,30 +33,30 @@ void (*machine_check_vector)(struct pt_regs *, long error_code) = unexpected_mac
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/* This has to be run for each processor */
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void mcheck_init(struct cpuinfo_x86 *c)
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{
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if (mce_disabled==1)
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if (mce_disabled == 1)
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return;
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switch (c->x86_vendor) {
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case X86_VENDOR_AMD:
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amd_mcheck_init(c);
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break;
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case X86_VENDOR_AMD:
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amd_mcheck_init(c);
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break;
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case X86_VENDOR_INTEL:
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if (c->x86==5)
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intel_p5_mcheck_init(c);
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if (c->x86==6)
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intel_p6_mcheck_init(c);
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if (c->x86==15)
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intel_p4_mcheck_init(c);
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break;
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case X86_VENDOR_INTEL:
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if (c->x86 == 5)
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intel_p5_mcheck_init(c);
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if (c->x86 == 6)
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intel_p6_mcheck_init(c);
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if (c->x86 == 15)
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intel_p4_mcheck_init(c);
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break;
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case X86_VENDOR_CENTAUR:
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if (c->x86==5)
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winchip_mcheck_init(c);
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break;
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case X86_VENDOR_CENTAUR:
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if (c->x86 == 5)
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winchip_mcheck_init(c);
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break;
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default:
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break;
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default:
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break;
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}
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}
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