iio:adc:at91-sama5d2: add support for differential conversions
Add signed differential channels and update the voltage scale for differential conversions. Signed-off-by: Ludovic Desroches <ludovic.desroches@atmel.com> Signed-off-by: Jonathan Cameron <jic23@kernel.org>
This commit is contained in:
Ludovic Desroches
Jonathan Cameron
parent
94b2423019
commit
d65113222c
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@ -113,8 +113,11 @@
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#define AT91_SAMA5D2_CWR 0x44
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/* Channel Gain Register */
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#define AT91_SAMA5D2_CGR 0x48
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/* Channel Offset Register */
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#define AT91_SAMA5D2_COR 0x4c
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#define AT91_SAMA5D2_COR_DIFF_OFFSET 16
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/* Channel Data Register 0 */
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#define AT91_SAMA5D2_CDR0 0x50
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/* Analog Control Register */
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@ -142,7 +145,7 @@
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/* Version Register */
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#define AT91_SAMA5D2_VERSION 0xfc
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#define AT91_SAMA5D2_CHAN(num, addr) \
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#define AT91_SAMA5D2_CHAN_SINGLE(num, addr) \
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{ \
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.type = IIO_VOLTAGE, \
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.channel = num, \
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@ -158,6 +161,24 @@
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.indexed = 1, \
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}
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#define AT91_SAMA5D2_CHAN_DIFF(num, num2, addr) \
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{ \
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.type = IIO_VOLTAGE, \
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.differential = 1, \
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.channel = num, \
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.channel2 = num2, \
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.address = addr, \
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.scan_type = { \
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.sign = 's', \
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.realbits = 12, \
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}, \
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.info_mask_separate = BIT(IIO_CHAN_INFO_RAW), \
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.info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE), \
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.info_mask_shared_by_all = BIT(IIO_CHAN_INFO_SAMP_FREQ),\
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.datasheet_name = "CH"#num"-CH"#num2, \
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.indexed = 1, \
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}
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#define at91_adc_readl(st, reg) readl_relaxed(st->base + reg)
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#define at91_adc_writel(st, reg, val) writel_relaxed(val, st->base + reg)
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@ -187,18 +208,24 @@ struct at91_adc_state {
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};
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static const struct iio_chan_spec at91_adc_channels[] = {
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AT91_SAMA5D2_CHAN(0, 0x50),
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AT91_SAMA5D2_CHAN(1, 0x54),
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AT91_SAMA5D2_CHAN(2, 0x58),
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AT91_SAMA5D2_CHAN(3, 0x5c),
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AT91_SAMA5D2_CHAN(4, 0x60),
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AT91_SAMA5D2_CHAN(5, 0x64),
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AT91_SAMA5D2_CHAN(6, 0x68),
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AT91_SAMA5D2_CHAN(7, 0x6c),
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AT91_SAMA5D2_CHAN(8, 0x70),
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AT91_SAMA5D2_CHAN(9, 0x74),
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AT91_SAMA5D2_CHAN(10, 0x78),
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AT91_SAMA5D2_CHAN(11, 0x7c),
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AT91_SAMA5D2_CHAN_SINGLE(0, 0x50),
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AT91_SAMA5D2_CHAN_SINGLE(1, 0x54),
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AT91_SAMA5D2_CHAN_SINGLE(2, 0x58),
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AT91_SAMA5D2_CHAN_SINGLE(3, 0x5c),
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AT91_SAMA5D2_CHAN_SINGLE(4, 0x60),
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AT91_SAMA5D2_CHAN_SINGLE(5, 0x64),
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AT91_SAMA5D2_CHAN_SINGLE(6, 0x68),
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AT91_SAMA5D2_CHAN_SINGLE(7, 0x6c),
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AT91_SAMA5D2_CHAN_SINGLE(8, 0x70),
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AT91_SAMA5D2_CHAN_SINGLE(9, 0x74),
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AT91_SAMA5D2_CHAN_SINGLE(10, 0x78),
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AT91_SAMA5D2_CHAN_SINGLE(11, 0x7c),
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AT91_SAMA5D2_CHAN_DIFF(0, 1, 0x50),
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AT91_SAMA5D2_CHAN_DIFF(2, 3, 0x58),
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AT91_SAMA5D2_CHAN_DIFF(4, 5, 0x60),
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AT91_SAMA5D2_CHAN_DIFF(6, 7, 0x68),
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AT91_SAMA5D2_CHAN_DIFF(8, 9, 0x70),
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AT91_SAMA5D2_CHAN_DIFF(10, 11, 0x78),
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};
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static unsigned at91_adc_startup_time(unsigned startup_time_min,
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@ -281,6 +308,7 @@ static int at91_adc_read_raw(struct iio_dev *indio_dev,
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int *val, int *val2, long mask)
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{
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struct at91_adc_state *st = iio_priv(indio_dev);
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u32 cor = 0;
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int ret;
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switch (mask) {
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@ -289,6 +317,11 @@ static int at91_adc_read_raw(struct iio_dev *indio_dev,
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st->chan = chan;
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if (chan->differential)
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cor = (BIT(chan->channel) | BIT(chan->channel2)) <<
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AT91_SAMA5D2_COR_DIFF_OFFSET;
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at91_adc_writel(st, AT91_SAMA5D2_COR, cor);
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at91_adc_writel(st, AT91_SAMA5D2_CHER, BIT(chan->channel));
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at91_adc_writel(st, AT91_SAMA5D2_IER, BIT(chan->channel));
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at91_adc_writel(st, AT91_SAMA5D2_CR, AT91_SAMA5D2_CR_START);
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@ -301,6 +334,8 @@ static int at91_adc_read_raw(struct iio_dev *indio_dev,
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if (ret > 0) {
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*val = st->conversion_value;
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if (chan->scan_type.sign == 's')
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*val = sign_extend32(*val, 11);
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ret = IIO_VAL_INT;
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st->conversion_done = false;
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}
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@ -313,6 +348,8 @@ static int at91_adc_read_raw(struct iio_dev *indio_dev,
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case IIO_CHAN_INFO_SCALE:
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*val = st->vref_uv / 1000;
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if (chan->differential)
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*val *= 2;
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*val2 = chan->scan_type.realbits;
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return IIO_VAL_FRACTIONAL_LOG2;
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@ -447,8 +484,12 @@ static int at91_adc_probe(struct platform_device *pdev)
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at91_adc_writel(st, AT91_SAMA5D2_CR, AT91_SAMA5D2_CR_SWRST);
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at91_adc_writel(st, AT91_SAMA5D2_IDR, 0xffffffff);
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/* Transfer field must be set to 2 according to the datasheet. */
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at91_adc_writel(st, AT91_SAMA5D2_MR, AT91_SAMA5D2_MR_TRANSFER(2));
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/*
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* Transfer field must be set to 2 according to the datasheet and
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* allows different analog settings for each channel.
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*/
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at91_adc_writel(st, AT91_SAMA5D2_MR,
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AT91_SAMA5D2_MR_TRANSFER(2) | AT91_SAMA5D2_MR_ANACH);
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at91_adc_setup_samp_freq(st, st->soc_info.min_sample_rate);
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