[MIPS] Add bcm1480 ZBus trace support, fix wait related bugs
Make ZBus tracing generic - moving it to a common direcotry under arch/mips/sibyte, add bcm1480 support and fix some wait related bugs (thanks to Ralf for assistance on that). Signed-off-by: Mark Mason <mason@broadcom.com> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
This commit is contained in:
Mark Mason
Ralf Baechle
parent
8deab1144b
commit
d619f38fda
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@ -530,25 +530,29 @@ cflags-$(CONFIG_SGI_IP32) += -Iinclude/asm-mips/mach-ip32
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load-$(CONFIG_SGI_IP32) += 0xffffffff80004000
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#
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# Sibyte SB1250 SOC
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# Sibyte SB1250/BCM1480 SOC
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#
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# This is a LIB so that it links at the end, and initcalls are later
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# the sequence; but it is built as an object so that modules don't get
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# removed (as happens, even if they have __initcall/module_init)
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#
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core-$(CONFIG_SIBYTE_BCM112X) += arch/mips/sibyte/sb1250/
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core-$(CONFIG_SIBYTE_BCM112X) += arch/mips/sibyte/common/
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cflags-$(CONFIG_SIBYTE_BCM112X) += -Iinclude/asm-mips/mach-sibyte \
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-DSIBYTE_HDR_FEATURES=SIBYTE_HDR_FMASK_1250_112x_ALL
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core-$(CONFIG_SIBYTE_SB1250) += arch/mips/sibyte/sb1250/
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core-$(CONFIG_SIBYTE_SB1250) += arch/mips/sibyte/common/
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cflags-$(CONFIG_SIBYTE_SB1250) += -Iinclude/asm-mips/mach-sibyte \
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-DSIBYTE_HDR_FEATURES=SIBYTE_HDR_FMASK_1250_112x_ALL
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core-$(CONFIG_SIBYTE_BCM1x55) += arch/mips/sibyte/bcm1480/
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core-$(CONFIG_SIBYTE_BCM1x55) += arch/mips/sibyte/common/
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cflags-$(CONFIG_SIBYTE_BCM1x55) += -Iinclude/asm-mips/mach-sibyte \
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-DSIBYTE_HDR_FEATURES=SIBYTE_HDR_FMASK_1480_ALL
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core-$(CONFIG_SIBYTE_BCM1x80) += arch/mips/sibyte/bcm1480/
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core-$(CONFIG_SIBYTE_BCM1x80) += arch/mips/sibyte/common/
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cflags-$(CONFIG_SIBYTE_BCM1x80) += -Iinclude/asm-mips/mach-sibyte \
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-DSIBYTE_HDR_FEATURES=SIBYTE_HDR_FMASK_1480_ALL
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@ -2,6 +2,7 @@ config SIBYTE_SB1250
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bool
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select HW_HAS_PCI
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select SIBYTE_ENABLE_LDT_IF_PCI
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select SIBYTE_HAS_ZBUS_PROFILING
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select SIBYTE_SB1xxx_SOC
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select SYS_SUPPORTS_SMP
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@ -34,6 +35,7 @@ config SIBYTE_BCM112X
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config SIBYTE_BCM1x80
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bool
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select HW_HAS_PCI
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select SIBYTE_HAS_ZBUS_PROFILING
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select SIBYTE_SB1xxx_SOC
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select SYS_SUPPORTS_SMP
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@ -0,0 +1,5 @@
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obj-y :=
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obj-$(CONFIG_SIBYTE_TBPROF) += sb_tbprof.o
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EXTRA_AFLAGS := $(CFLAGS)
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@ -31,14 +31,29 @@
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#include <linux/vmalloc.h>
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#include <linux/fs.h>
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#include <linux/errno.h>
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#include <linux/types.h>
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#include <linux/wait.h>
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#include <asm/io.h>
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#include <asm/sibyte/sb1250.h>
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#if defined(CONFIG_SIBYTE_BCM1x55) || defined(CONFIG_SIBYTE_BCM1x80)
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#include <asm/sibyte/bcm1480_regs.h>
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#include <asm/sibyte/bcm1480_scd.h>
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#include <asm/sibyte/bcm1480_int.h>
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#elif defined(CONFIG_SIBYTE_SB1250) || defined(CONFIG_SIBYTE_BCM112X)
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#include <asm/sibyte/sb1250_regs.h>
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#include <asm/sibyte/sb1250_scd.h>
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#include <asm/sibyte/sb1250_int.h>
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#else
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#error invalid SiByte UART configuation
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#endif
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#if defined(CONFIG_SIBYTE_BCM1x55) || defined(CONFIG_SIBYTE_BCM1x80)
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#undef K_INT_TRACE_FREEZE
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#define K_INT_TRACE_FREEZE K_BCM1480_INT_TRACE_FREEZE
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#undef K_INT_PERF_CNT
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#define K_INT_PERF_CNT K_BCM1480_INT_PERF_CNT
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#endif
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#include <asm/system.h>
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#include <asm/uaccess.h>
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@ -118,7 +133,7 @@ static struct sbprof_tb sbp;
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: /* inputs */ \
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: /* modifies */ "$8" )
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#define DEVNAME "bcm1250_tbprof"
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#define DEVNAME "sb_tbprof"
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#define TB_FULL (sbp.next_tb_sample == MAX_TB_SAMPLES)
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@ -132,6 +147,7 @@ static struct sbprof_tb sbp;
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* overflow.
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*
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* We map the interrupt for trace_buffer_freeze to handle it on CPU 0.
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*
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*/
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static u64 tb_period;
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@ -143,25 +159,36 @@ static void arm_tb(void)
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u64 tb_options = M_SCD_TRACE_CFG_FREEZE_FULL;
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/*
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* Generate an SCD_PERFCNT interrupt in TB_PERIOD Zclks to trigger
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*start of trace. XXX vary sampling period
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* Generate an SCD_PERFCNT interrupt in TB_PERIOD Zclks to
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* trigger start of trace. XXX vary sampling period
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*/
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__raw_writeq(0, IOADDR(A_SCD_PERF_CNT_1));
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scdperfcnt = __raw_readq(IOADDR(A_SCD_PERF_CNT_CFG));
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/*
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* Unfortunately, in Pass 2 we must clear all counters to knock down a
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* previous interrupt request. This means that bus profiling requires
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* ALL of the SCD perf counters.
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* Unfortunately, in Pass 2 we must clear all counters to knock down
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* a previous interrupt request. This means that bus profiling
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* requires ALL of the SCD perf counters.
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*/
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#if defined(CONFIG_SIBYTE_BCM1x55) || defined(CONFIG_SIBYTE_BCM1x80)
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__raw_writeq((scdperfcnt & ~M_SPC_CFG_SRC1) |
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/* keep counters 0,2,3,4,5,6,7 as is */
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V_SPC_CFG_SRC1(1), /* counter 1 counts cycles */
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IOADDR(A_BCM1480_SCD_PERF_CNT_CFG0));
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__raw_writeq(
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M_SPC_CFG_ENABLE | /* enable counting */
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M_SPC_CFG_CLEAR | /* clear all counters */
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V_SPC_CFG_SRC1(1), /* counter 1 counts cycles */
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IOADDR(A_BCM1480_SCD_PERF_CNT_CFG1));
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#else
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__raw_writeq((scdperfcnt & ~M_SPC_CFG_SRC1) |
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/* keep counters 0,2,3 as is */
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M_SPC_CFG_ENABLE | /* enable counting */
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M_SPC_CFG_CLEAR | /* clear all counters */
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V_SPC_CFG_SRC1(1), /* counter 1 counts cycles */
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IOADDR(A_SCD_PERF_CNT_CFG));
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#endif
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__raw_writeq(next, IOADDR(A_SCD_PERF_CNT_1));
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/* Reset the trace buffer */
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__raw_writeq(M_SCD_TRACE_CFG_RESET, IOADDR(A_SCD_TRACE_CFG));
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#if 0 && defined(M_SCD_TRACE_CFG_FORCECNT)
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@ -190,38 +217,37 @@ static irqreturn_t sbprof_tb_intr(int irq, void *dev_id)
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/* Subscripts decrease to put bundle in the order */
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/* t0 lo, t0 hi, t1 lo, t1 hi, t2 lo, t2 hi */
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p[i - 1] = __raw_readq(IOADDR(A_SCD_TRACE_READ));
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/* read t2 hi */
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/* read t2 hi */
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p[i - 2] = __raw_readq(IOADDR(A_SCD_TRACE_READ));
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/* read t2 lo */
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/* read t2 lo */
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p[i - 3] = __raw_readq(IOADDR(A_SCD_TRACE_READ));
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/* read t1 hi */
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/* read t1 hi */
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p[i - 4] = __raw_readq(IOADDR(A_SCD_TRACE_READ));
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/* read t1 lo */
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/* read t1 lo */
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p[i - 5] = __raw_readq(IOADDR(A_SCD_TRACE_READ));
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/* read t0 hi */
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/* read t0 hi */
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p[i - 6] = __raw_readq(IOADDR(A_SCD_TRACE_READ));
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/* read t0 lo */
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/* read t0 lo */
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}
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if (!sbp.tb_enable) {
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pr_debug(DEVNAME ": tb_intr shutdown\n");
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__raw_writeq(M_SCD_TRACE_CFG_RESET,
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IOADDR(A_SCD_TRACE_CFG));
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sbp.tb_armed = 0;
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wake_up(&sbp.tb_sync);
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wake_up_interruptible(&sbp.tb_sync);
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} else {
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arm_tb(); /* knock down current interrupt and get another one later */
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/* knock down current interrupt and get another one later */
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arm_tb();
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}
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} else {
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/* No more trace buffer samples */
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pr_debug(DEVNAME ": tb_intr full\n");
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__raw_writeq(M_SCD_TRACE_CFG_RESET, IOADDR(A_SCD_TRACE_CFG));
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sbp.tb_armed = 0;
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if (!sbp.tb_enable) {
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wake_up(&sbp.tb_sync);
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}
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wake_up(&sbp.tb_read);
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if (!sbp.tb_enable)
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wake_up_interruptible(&sbp.tb_sync);
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wake_up_interruptible(&sbp.tb_read);
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}
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return IRQ_HANDLED;
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}
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@ -250,8 +276,8 @@ static int sbprof_zbprof_start(struct file *filp)
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sbp.next_tb_sample = 0;
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filp->f_pos = 0;
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err = request_irq(K_INT_TRACE_FREEZE, sbprof_tb_intr, 0,
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DEVNAME " trace freeze", &sbp);
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err = request_irq (K_INT_TRACE_FREEZE, sbprof_tb_intr, 0,
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DEVNAME " trace freeze", &sbp);
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if (err)
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return -EBUSY;
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@ -263,23 +289,29 @@ static int sbprof_zbprof_start(struct file *filp)
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IOADDR(A_SCD_PERF_CNT_CFG));
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/*
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* We grab this interrupt to prevent others from trying to use it, even
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* though we don't want to service the interrupts (they only feed into
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* the trace-on-interrupt mechanism)
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* We grab this interrupt to prevent others from trying to use
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* it, even though we don't want to service the interrupts
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* (they only feed into the trace-on-interrupt mechanism)
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*/
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err = request_irq(K_INT_PERF_CNT, sbprof_pc_intr, 0,
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DEVNAME " scd perfcnt", &sbp);
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if (err)
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goto out_free_irq;
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if (request_irq(K_INT_PERF_CNT, sbprof_pc_intr, 0, DEVNAME " scd perfcnt", &sbp)) {
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free_irq(K_INT_TRACE_FREEZE, &sbp);
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return -EBUSY;
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}
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/*
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* I need the core to mask these, but the interrupt mapper to pass them
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* through. I am exploiting my knowledge that cp0_status masks out
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* IP[5]. krw
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* I need the core to mask these, but the interrupt mapper to
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* pass them through. I am exploiting my knowledge that
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* cp0_status masks out IP[5]. krw
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*/
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#if defined(CONFIG_SIBYTE_BCM1x55) || defined(CONFIG_SIBYTE_BCM1x80)
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__raw_writeq(K_BCM1480_INT_MAP_I3,
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IOADDR(A_BCM1480_IMR_REGISTER(0, R_BCM1480_IMR_INTERRUPT_MAP_BASE_L) +
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((K_BCM1480_INT_PERF_CNT & 0x3f) << 3)));
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#else
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__raw_writeq(K_INT_MAP_I3,
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IOADDR(A_IMR_REGISTER(0, R_IMR_INTERRUPT_MAP_BASE) +
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(K_INT_PERF_CNT << 3)));
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#endif
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/* Initialize address traps */
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__raw_writeq(0, IOADDR(A_ADDR_TRAP_UP_0));
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@ -298,7 +330,7 @@ static int sbprof_zbprof_start(struct file *filp)
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__raw_writeq(0, IOADDR(A_ADDR_TRAP_CFG_3));
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/* Initialize Trace Event 0-7 */
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/* when interrupt */
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/* when interrupt */
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__raw_writeq(M_SCD_TREVT_INTERRUPT, IOADDR(A_SCD_TRACE_EVENT_0));
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__raw_writeq(0, IOADDR(A_SCD_TRACE_EVENT_1));
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__raw_writeq(0, IOADDR(A_SCD_TRACE_EVENT_2));
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@ -324,24 +356,23 @@ static int sbprof_zbprof_start(struct file *filp)
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__raw_writeq(0, IOADDR(A_SCD_TRACE_SEQUENCE_7));
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/* Now indicate the PERF_CNT interrupt as a trace-relevant interrupt */
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#if defined(CONFIG_SIBYTE_BCM1x55) || defined(CONFIG_SIBYTE_BCM1x80)
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__raw_writeq(1ULL << (K_BCM1480_INT_PERF_CNT & 0x3f),
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IOADDR(A_BCM1480_IMR_REGISTER(0, R_BCM1480_IMR_INTERRUPT_TRACE_L)));
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#else
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__raw_writeq(1ULL << K_INT_PERF_CNT,
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IOADDR(A_IMR_REGISTER(0, R_IMR_INTERRUPT_TRACE)));
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#endif
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arm_tb();
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pr_debug(DEVNAME ": done starting\n");
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return 0;
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out_free_irq:
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free_irq(K_INT_TRACE_FREEZE, &sbp);
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return err;
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}
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static int sbprof_zbprof_stop(void)
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{
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int err;
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int err = 0;
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pr_debug(DEVNAME ": stopping\n");
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@ -365,7 +396,7 @@ static int sbprof_zbprof_stop(void)
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pr_debug(DEVNAME ": done stopping\n");
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return 0;
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return err;
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}
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static int sbprof_tb_open(struct inode *inode, struct file *filp)
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@ -380,11 +411,9 @@ static int sbprof_tb_open(struct inode *inode, struct file *filp)
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return -EBUSY;
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memset(&sbp, 0, sizeof(struct sbprof_tb));
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sbp.sbprof_tbbuf = vmalloc(MAX_TBSAMPLE_BYTES);
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if (!sbp.sbprof_tbbuf)
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return -ENOMEM;
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memset(sbp.sbprof_tbbuf, 0, MAX_TBSAMPLE_BYTES);
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init_waitqueue_head(&sbp.tb_sync);
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init_waitqueue_head(&sbp.tb_read);
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@ -397,8 +426,9 @@ static int sbprof_tb_open(struct inode *inode, struct file *filp)
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static int sbprof_tb_release(struct inode *inode, struct file *filp)
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{
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int minor = iminor(inode);
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int minor;
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minor = iminor(inode);
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if (minor != 0 || !sbp.open)
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return -ENODEV;
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@ -419,10 +449,10 @@ static ssize_t sbprof_tb_read(struct file *filp, char *buf,
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size_t size, loff_t *offp)
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{
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int cur_sample, sample_off, cur_count, sample_left;
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long cur_off = *offp;
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char *dest = buf;
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int count = 0;
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char *src;
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int count = 0;
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char *dest = buf;
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long cur_off = *offp;
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if (!access_ok(VERIFY_WRITE, buf, size))
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return -EFAULT;
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@ -445,7 +475,6 @@ static ssize_t sbprof_tb_read(struct file *filp, char *buf,
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mutex_unlock(&sbp.lock);
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return err;
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}
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pr_debug(DEVNAME ": read from sample %d, %d bytes\n",
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cur_sample, cur_count);
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size -= cur_count;
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@ -461,45 +490,46 @@ static ssize_t sbprof_tb_read(struct file *filp, char *buf,
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dest += cur_count;
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count += cur_count;
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}
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*offp = cur_off;
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mutex_unlock(&sbp.lock);
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return count;
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}
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static long sbprof_tb_ioctl(struct file *filp, unsigned int command,
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unsigned long arg)
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static long sbprof_tb_ioctl(struct file *filp,
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unsigned int command,
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unsigned long arg)
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{
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int error = 0;
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int err = 0;
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switch (command) {
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case SBPROF_ZBSTART:
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mutex_lock(&sbp.lock);
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error = sbprof_zbprof_start(filp);
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err = sbprof_zbprof_start(filp);
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mutex_unlock(&sbp.lock);
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break;
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case SBPROF_ZBSTOP:
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mutex_lock(&sbp.lock);
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error = sbprof_zbprof_stop();
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err = sbprof_zbprof_stop();
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mutex_unlock(&sbp.lock);
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break;
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case SBPROF_ZBWAITFULL:
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error = wait_event_interruptible(sbp.tb_read, TB_FULL);
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if (error)
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case SBPROF_ZBWAITFULL: {
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err = wait_event_interruptible(sbp.tb_read, TB_FULL);
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if (err)
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break;
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error = put_user(TB_FULL, (int *) arg);
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break;
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default:
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error = -EINVAL;
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err = put_user(TB_FULL, (int *) arg);
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break;
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}
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return error;
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default:
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err = -EINVAL;
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break;
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}
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return err;
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}
|
||||
|
||||
static const struct file_operations sbprof_tb_fops = {
|
||||
|
|
@ -544,8 +574,8 @@ static int __init sbprof_tb_init(void)
|
|||
|
||||
sbp.open = 0;
|
||||
tb_period = zbbus_mhz * 10000LL;
|
||||
pr_info(DEVNAME ": initialized - tb_period = %lld\n", tb_period);
|
||||
|
||||
pr_info(DEVNAME ": initialized - tb_period = %lld\n",
|
||||
(long long) tb_period);
|
||||
return 0;
|
||||
|
||||
out_class:
|
||||
|
|
@ -1,6 +1,5 @@
|
|||
obj-y := setup.o irq.o time.o
|
||||
|
||||
obj-$(CONFIG_SMP) += smp.o
|
||||
obj-$(CONFIG_SIBYTE_TBPROF) += bcm1250_tbprof.o
|
||||
obj-$(CONFIG_SIBYTE_STANDALONE) += prom.o
|
||||
obj-$(CONFIG_SIBYTE_BUS_WATCHER) += bus_watcher.o
|
||||
|
|
|
|||
Loading…
Reference in New Issue