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arm64: dts: qcom: sm8250: fix PCIe bindings to follow schema 

Replace (unused) enable-gpio binding with schema-defined wake-gpios. The
GPIO line is still unused, but at least we'd follow the defined schema.

While we are at it, change perst-gpio property to follow the preferred
naming schema (perst-gpios).

Fixes: 13e948a36d ("arm64: dts: qcom: sm8250: Commonize PCIe pins")
Cc: Konrad Dybcio <konrad.dybcio@somainline.org>
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20211214231448.2044987-1-dmitry.baryshkov@linaro.org
This commit is contained in:
Dmitry Baryshkov 2021-12-15 02:14:48 +03:00 committed by Bjorn Andersson
parent ff15ae73ee
commit d605072004
1 changed files with 6 additions and 6 deletions
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12
arch/arm64/boot/dts/qcom/sm8250.dtsi
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@ -1740,8 +1740,8 @@
phys = <&pcie0_lane>; phys = <&pcie0_lane>;
phy-names = "pciephy"; phy-names = "pciephy";
perst-gpio = <&tlmm 79 GPIO_ACTIVE_LOW>; perst-gpios = <&tlmm 79 GPIO_ACTIVE_LOW>;
enable-gpio = <&tlmm 81 GPIO_ACTIVE_HIGH>; wake-gpios = <&tlmm 81 GPIO_ACTIVE_HIGH>;
pinctrl-names = "default"; pinctrl-names = "default";
pinctrl-0 = <&pcie0_default_state>; pinctrl-0 = <&pcie0_default_state>;
@ -1844,8 +1844,8 @@
phys = <&pcie1_lane>; phys = <&pcie1_lane>;
phy-names = "pciephy"; phy-names = "pciephy";
perst-gpio = <&tlmm 82 GPIO_ACTIVE_LOW>; perst-gpios = <&tlmm 82 GPIO_ACTIVE_LOW>;
enable-gpio = <&tlmm 84 GPIO_ACTIVE_HIGH>; wake-gpios = <&tlmm 84 GPIO_ACTIVE_HIGH>;
pinctrl-names = "default"; pinctrl-names = "default";
pinctrl-0 = <&pcie1_default_state>; pinctrl-0 = <&pcie1_default_state>;
@ -1950,8 +1950,8 @@
phys = <&pcie2_lane>; phys = <&pcie2_lane>;
phy-names = "pciephy"; phy-names = "pciephy";
perst-gpio = <&tlmm 85 GPIO_ACTIVE_LOW>; perst-gpios = <&tlmm 85 GPIO_ACTIVE_LOW>;
enable-gpio = <&tlmm 87 GPIO_ACTIVE_HIGH>; wake-gpios = <&tlmm 87 GPIO_ACTIVE_HIGH>;
pinctrl-names = "default"; pinctrl-names = "default";
pinctrl-0 = <&pcie2_default_state>; pinctrl-0 = <&pcie2_default_state>;