ARM: dts: bcm2711: Enable PCIe controller
This enables bcm2711's PCIe bus, which is hardwired to a VIA Technologies XHCI USB 3.0 controller. Signed-off-by: Nicolas Saenz Julienne <nsaenzjulienne@suse.de> Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
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@ -309,7 +309,36 @@
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#address-cells = <2>;
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#size-cells = <1>;
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ranges = <0x0 0x7c000000 0x0 0xfc000000 0x03800000>;
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ranges = <0x0 0x7c000000 0x0 0xfc000000 0x03800000>,
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<0x6 0x00000000 0x6 0x00000000 0x40000000>;
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pcie0: pcie@7d500000 {
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compatible = "brcm,bcm2711-pcie";
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reg = <0x0 0x7d500000 0x9310>;
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device_type = "pci";
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#address-cells = <3>;
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#interrupt-cells = <1>;
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#size-cells = <2>;
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interrupts = <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>;
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interrupt-names = "pcie", "msi";
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interrupt-map-mask = <0x0 0x0 0x0 0x7>;
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interrupt-map = <0 0 0 1 &gicv2 GIC_SPI 143
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IRQ_TYPE_LEVEL_HIGH>;
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msi-controller;
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msi-parent = <&pcie0>;
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ranges = <0x02000000 0x0 0xf8000000 0x6 0x00000000
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0x0 0x04000000>;
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/*
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* The wrapper around the PCIe block has a bug
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* preventing it from accessing beyond the first 3GB of
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* memory.
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*/
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dma-ranges = <0x02000000 0x0 0x00000000 0x0 0x00000000
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0x0 0xc0000000>;
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brcm,enable-ssc;
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};
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genet: ethernet@7d580000 {
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compatible = "brcm,bcm2711-genet-v5";
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