drm/amdgpu: enable gfxoff feature for navi10 asic

enable gfxoff feature for some navi10 asics

Signed-off-by: Kevin Wang <kevin1.wang@amd.com>
Reviewed-by: Feifei Xu <Feifei.Xu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
This commit is contained in:
Kevin Wang 2019-12-11 17:30:26 +08:00 committed by Alex Deucher
parent 5f5202bf69
commit d549991ce5
1 changed files with 19 additions and 1 deletions

View File

@ -610,11 +610,29 @@ static void gfx_v10_0_init_rlc_ext_microcode(struct amdgpu_device *adev)
le32_to_cpu(rlc_hdr->reg_list_format_direct_reg_list_length); le32_to_cpu(rlc_hdr->reg_list_format_direct_reg_list_length);
} }
static bool gfx_v10_0_navi10_gfxoff_should_enable(struct amdgpu_device *adev)
{
bool ret = false;
switch (adev->pdev->revision) {
case 0xc2:
case 0xc3:
ret = true;
break;
default:
ret = false;
break;
}
return ret ;
}
static void gfx_v10_0_check_gfxoff_flag(struct amdgpu_device *adev) static void gfx_v10_0_check_gfxoff_flag(struct amdgpu_device *adev)
{ {
switch (adev->asic_type) { switch (adev->asic_type) {
case CHIP_NAVI10: case CHIP_NAVI10:
adev->pm.pp_feature &= ~PP_GFXOFF_MASK; if (!gfx_v10_0_navi10_gfxoff_should_enable(adev))
adev->pm.pp_feature &= ~PP_GFXOFF_MASK;
break; break;
default: default:
break; break;