ASoC: tlv320adcx140: Add support for configuring GPIO pin

Add support to configure the GPIO pin to the specific configuration.
The GPIO pin can be configured as GPO, IRQ, SDOUT2, PDMCLK, MICBASE_EN,
GPI, MCLK, SDIN, PDMDIN1, PDMDIN2, PDMDIN3 or PDMDIN4 and the output
drive can be configured with various configuration.

Signed-off-by: Camel Guo <camelg@axis.com>
Link: https://lore.kernel.org/r/20200918114025.18205-2-camel.guo@axis.com
Signed-off-by: Mark Brown <broonie@kernel.org>
This commit is contained in:
Camel Guo 2020-09-18 13:40:25 +02:00 committed by Mark Brown
parent 15b3d324c8
commit d521432149
No known key found for this signature in database
GPG Key ID: 24D68B725D5487D0
2 changed files with 45 additions and 0 deletions

View File

@ -861,6 +861,42 @@ static int adcx140_configure_gpo(struct adcx140_priv *adcx140)
}
static int adcx140_configure_gpio(struct adcx140_priv *adcx140)
{
int gpio_count = 0;
u32 gpio_outputs[ADCX140_NUM_GPIO_CFGS];
u32 gpio_output_val = 0;
int ret;
gpio_count = device_property_count_u32(adcx140->dev,
"ti,gpio-config");
if (gpio_count == 0)
return 0;
if (gpio_count != ADCX140_NUM_GPIO_CFGS)
return -EINVAL;
ret = device_property_read_u32_array(adcx140->dev, "ti,gpio-config",
gpio_outputs, gpio_count);
if (ret)
return ret;
if (gpio_outputs[0] > ADCX140_GPIO_CFG_MAX) {
dev_err(adcx140->dev, "GPIO config out of range\n");
return -EINVAL;
}
if (gpio_outputs[1] > ADCX140_GPIO_DRV_MAX) {
dev_err(adcx140->dev, "GPIO drive out of range\n");
return -EINVAL;
}
gpio_output_val = gpio_outputs[0] << ADCX140_GPIO_SHIFT
| gpio_outputs[1];
return regmap_write(adcx140->regmap, ADCX140_GPIO_CFG0, gpio_output_val);
}
static int adcx140_codec_probe(struct snd_soc_component *component)
{
struct adcx140_priv *adcx140 = snd_soc_component_get_drvdata(component);
@ -958,6 +994,10 @@ static int adcx140_codec_probe(struct snd_soc_component *component)
return ret;
}
ret = adcx140_configure_gpio(adcx140);
if (ret)
return ret;
ret = adcx140_configure_gpo(adcx140);
if (ret)
goto out;

View File

@ -148,4 +148,9 @@
#define ADCX140_TX_FILL BIT(0)
#define ADCX140_NUM_GPIO_CFGS 2
#define ADCX140_GPIO_SHIFT 4
#define ADCX140_GPIO_CFG_MAX 15
#define ADCX140_GPIO_DRV_MAX 5
#endif /* _TLV320ADCX140_ */