x86/apic: Remove X86_IRQ_ALLOC_CONTIGUOUS_VECTORS
Now that the PCI/MSI core code does early checking for multi-MSI support X86_IRQ_ALLOC_CONTIGUOUS_VECTORS is not required anymore. Remove the flag and rely on MSI_FLAG_MULTI_PCI_MSI. Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Reviewed-by: Jason Gunthorpe <jgg@nvidia.com> Link: https://lore.kernel.org/r/20221111122015.865042356@linutronix.de
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parent
2569f62ca4
commit
d474d92d70
arch/x86
drivers
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@ -7,9 +7,7 @@
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#ifdef CONFIG_X86_LOCAL_APIC
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enum {
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/* Allocate contiguous CPU vectors */
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X86_IRQ_ALLOC_CONTIGUOUS_VECTORS = 0x1,
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X86_IRQ_ALLOC_LEGACY = 0x2,
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X86_IRQ_ALLOC_LEGACY = 0x1,
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};
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extern int x86_fwspec_is_ioapic(struct irq_fwspec *fwspec);
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@ -161,12 +161,10 @@ int pci_msi_prepare(struct irq_domain *domain, struct device *dev, int nvec,
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msi_alloc_info_t *arg)
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{
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init_irq_alloc_info(arg, NULL);
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if (to_pci_dev(dev)->msix_enabled) {
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if (to_pci_dev(dev)->msix_enabled)
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arg->type = X86_IRQ_ALLOC_TYPE_PCI_MSIX;
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} else {
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else
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arg->type = X86_IRQ_ALLOC_TYPE_PCI_MSI;
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arg->flags |= X86_IRQ_ALLOC_CONTIGUOUS_VECTORS;
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}
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return 0;
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}
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@ -539,10 +539,6 @@ static int x86_vector_alloc_irqs(struct irq_domain *domain, unsigned int virq,
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if (disable_apic)
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return -ENXIO;
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/* Currently vector allocator can't guarantee contiguous allocations */
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if ((info->flags & X86_IRQ_ALLOC_CONTIGUOUS_VECTORS) && nr_irqs > 1)
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return -ENOSYS;
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/*
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* Catch any attempt to touch the cascade interrupt on a PIC
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* equipped system.
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@ -3297,13 +3297,6 @@ static int irq_remapping_alloc(struct irq_domain *domain, unsigned int virq,
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if (nr_irqs > 1 && info->type != X86_IRQ_ALLOC_TYPE_PCI_MSI)
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return -EINVAL;
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/*
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* With IRQ remapping enabled, don't need contiguous CPU vectors
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* to support multiple MSI interrupts.
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*/
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if (info->type == X86_IRQ_ALLOC_TYPE_PCI_MSI)
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info->flags &= ~X86_IRQ_ALLOC_CONTIGUOUS_VECTORS;
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sbdf = get_devid(info);
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if (sbdf < 0)
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return -EINVAL;
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@ -1337,13 +1337,6 @@ static int intel_irq_remapping_alloc(struct irq_domain *domain,
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if (nr_irqs > 1 && info->type != X86_IRQ_ALLOC_TYPE_PCI_MSI)
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return -EINVAL;
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/*
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* With IRQ remapping enabled, don't need contiguous CPU vectors
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* to support multiple MSI interrupts.
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*/
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if (info->type == X86_IRQ_ALLOC_TYPE_PCI_MSI)
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info->flags &= ~X86_IRQ_ALLOC_CONTIGUOUS_VECTORS;
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ret = irq_domain_alloc_irqs_parent(domain, virq, nr_irqs, arg);
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if (ret < 0)
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return ret;
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@ -611,20 +611,7 @@ static unsigned int hv_msi_get_int_vector(struct irq_data *data)
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return cfg->vector;
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}
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static int hv_msi_prepare(struct irq_domain *domain, struct device *dev,
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int nvec, msi_alloc_info_t *info)
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{
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int ret = pci_msi_prepare(domain, dev, nvec, info);
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/*
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* By using the interrupt remapper in the hypervisor IOMMU, contiguous
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* CPU vectors is not needed for multi-MSI
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*/
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if (info->type == X86_IRQ_ALLOC_TYPE_PCI_MSI)
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info->flags &= ~X86_IRQ_ALLOC_CONTIGUOUS_VECTORS;
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return ret;
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}
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#define hv_msi_prepare pci_msi_prepare
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/**
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* hv_arch_irq_unmask() - "Unmask" the IRQ by setting its current
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