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[BNX2]: Download 5709 firmware. 

Signed-off-by: Michael Chan <mchan@broadcom.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
This commit is contained in:
Michael Chan 2006-11-19 14:14:35 -08:00 committed by David S. Miller
parent 5793bfe19b
commit d43584c8bf
1 changed files with 38 additions and 4 deletions
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42
drivers/net/bnx2.c
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@ -53,6 +53,7 @@
#include "bnx2.h" #include "bnx2.h"
#include "bnx2_fw.h" #include "bnx2_fw.h"
#include "bnx2_fw2.h"
#define DRV_MODULE_NAME "bnx2" #define DRV_MODULE_NAME "bnx2"
#define PFX DRV_MODULE_NAME ": " #define PFX DRV_MODULE_NAME ": "
@ -2410,7 +2411,10 @@ bnx2_init_cpus(struct bnx2 *bp)
cpu_reg.spad_base = BNX2_RXP_SCRATCH; cpu_reg.spad_base = BNX2_RXP_SCRATCH;
cpu_reg.mips_view_base = 0x8000000; cpu_reg.mips_view_base = 0x8000000;
fw = &bnx2_rxp_fw_06; if (CHIP_NUM(bp) == CHIP_NUM_5709)
fw = &bnx2_rxp_fw_09;
else
fw = &bnx2_rxp_fw_06;
rc = load_cpu_fw(bp, &cpu_reg, fw); rc = load_cpu_fw(bp, &cpu_reg, fw);
if (rc) if (rc)
@ -2430,7 +2434,10 @@ bnx2_init_cpus(struct bnx2 *bp)
cpu_reg.spad_base = BNX2_TXP_SCRATCH; cpu_reg.spad_base = BNX2_TXP_SCRATCH;
cpu_reg.mips_view_base = 0x8000000; cpu_reg.mips_view_base = 0x8000000;
fw = &bnx2_txp_fw_06; if (CHIP_NUM(bp) == CHIP_NUM_5709)
fw = &bnx2_txp_fw_09;
else
fw = &bnx2_txp_fw_06;
rc = load_cpu_fw(bp, &cpu_reg, fw); rc = load_cpu_fw(bp, &cpu_reg, fw);
if (rc) if (rc)
@ -2450,7 +2457,10 @@ bnx2_init_cpus(struct bnx2 *bp)
cpu_reg.spad_base = BNX2_TPAT_SCRATCH; cpu_reg.spad_base = BNX2_TPAT_SCRATCH;
cpu_reg.mips_view_base = 0x8000000; cpu_reg.mips_view_base = 0x8000000;
fw = &bnx2_tpat_fw_06; if (CHIP_NUM(bp) == CHIP_NUM_5709)
fw = &bnx2_tpat_fw_09;
else
fw = &bnx2_tpat_fw_06;
rc = load_cpu_fw(bp, &cpu_reg, fw); rc = load_cpu_fw(bp, &cpu_reg, fw);
if (rc) if (rc)
@ -2470,12 +2480,36 @@ bnx2_init_cpus(struct bnx2 *bp)
cpu_reg.spad_base = BNX2_COM_SCRATCH; cpu_reg.spad_base = BNX2_COM_SCRATCH;
cpu_reg.mips_view_base = 0x8000000; cpu_reg.mips_view_base = 0x8000000;
fw = &bnx2_com_fw_06; if (CHIP_NUM(bp) == CHIP_NUM_5709)
fw = &bnx2_com_fw_09;
else
fw = &bnx2_com_fw_06;
rc = load_cpu_fw(bp, &cpu_reg, fw); rc = load_cpu_fw(bp, &cpu_reg, fw);
if (rc) if (rc)
goto init_cpu_err; goto init_cpu_err;
/* Initialize the Command Processor. */
cpu_reg.mode = BNX2_CP_CPU_MODE;
cpu_reg.mode_value_halt = BNX2_CP_CPU_MODE_SOFT_HALT;
cpu_reg.mode_value_sstep = BNX2_CP_CPU_MODE_STEP_ENA;
cpu_reg.state = BNX2_CP_CPU_STATE;
cpu_reg.state_value_clear = 0xffffff;
cpu_reg.gpr0 = BNX2_CP_CPU_REG_FILE;
cpu_reg.evmask = BNX2_CP_CPU_EVENT_MASK;
cpu_reg.pc = BNX2_CP_CPU_PROGRAM_COUNTER;
cpu_reg.inst = BNX2_CP_CPU_INSTRUCTION;
cpu_reg.bp = BNX2_CP_CPU_HW_BREAKPOINT;
cpu_reg.spad_base = BNX2_CP_SCRATCH;
cpu_reg.mips_view_base = 0x8000000;
if (CHIP_NUM(bp) == CHIP_NUM_5709) {
fw = &bnx2_cp_fw_09;
load_cpu_fw(bp, &cpu_reg, fw);
if (rc)
goto init_cpu_err;
}
init_cpu_err: init_cpu_err:
bnx2_gunzip_end(bp); bnx2_gunzip_end(bp);
return rc; return rc;