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dt-bindings: arm: sunxi: add binding for Lichee Zero Plus core board 

The Lichee Zero Plus is a core board made by Sipeed, with a microUSB
connector on it, TF slot or WSON8 SD chip, optional eMMC or SPI Flash.
It has a gold finger connector for expansion, and UART is available from
reserved pins w/ 2.54mm pitch. The board can use either SoChip S3 or
Allwinner V3L SoCs.

Add the device tree binding of the basic version of the core board --
w/o eMMC or SPI Flash, w/ TF slot or WSON8 SD, and use S3 SoC.

Signed-off-by: Icenowy Zheng <icenowy@aosc.io>
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
This commit is contained in:
Icenowy Zheng 2019-07-28 11:12:26 +08:00 committed by Maxime Ripard
parent 802cbe1b46
commit d400cc4ad1
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1 changed files with 6 additions and 0 deletions
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6
Documentation/devicetree/bindings/arm/sunxi.yaml
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@ -353,6 +353,12 @@ properties:
- const: licheepi,licheepi-zero
- const: allwinner,sun8i-v3s
- description: Lichee Zero Plus (with S3, without eMMC/SPI Flash)
items:
- const: sipeed,lichee-zero-plus
- const: sochip,s3
- const: allwinner,sun8i-v3
- description: Linksprite PCDuino
items:
- const: linksprite,a10-pcduino