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powerpc/8xx: Drop CONFIG_8xx_COPYBACK option 

CONFIG_8xx_COPYBACK was there to help disabling copyback cache mode
for debuging hardware. But nobody will design new boards with 8xx now.

All 8xx platforms select it, so make it the default and remove
the option.

Also remove the Mx_RESETVAL values which are pretty useless and hide
the real value while reading code.

Signed-off-by: Christophe Leroy <christophe.leroy@csgroup.eu>
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
Link: https://lore.kernel.org/r/bcc968cda075516eb76e2f25e09821f582c566b4.1589866984.git.christophe.leroy@csgroup.eu
This commit is contained in:
Christophe Leroy 2020-05-19 05:49:07 +00:00 committed by Michael Ellerman
parent b12c07a4bb
commit d3efcd38c0
8 changed files with 1 additions and 30 deletions
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1
arch/powerpc/configs/adder875_defconfig
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@ -10,7 +10,6 @@ CONFIG_EXPERT=y
# CONFIG_BLK_DEV_BSG is not set # CONFIG_BLK_DEV_BSG is not set
CONFIG_PARTITION_ADVANCED=y CONFIG_PARTITION_ADVANCED=y
CONFIG_PPC_ADDER875=y CONFIG_PPC_ADDER875=y
CONFIG_8xx_COPYBACK=y
CONFIG_GEN_RTC=y CONFIG_GEN_RTC=y
CONFIG_HZ_1000=y CONFIG_HZ_1000=y
# CONFIG_SECCOMP is not set # CONFIG_SECCOMP is not set

1
arch/powerpc/configs/ep88xc_defconfig
View File

@ -12,7 +12,6 @@ CONFIG_EXPERT=y
# CONFIG_BLK_DEV_BSG is not set # CONFIG_BLK_DEV_BSG is not set
CONFIG_PARTITION_ADVANCED=y CONFIG_PARTITION_ADVANCED=y
CONFIG_PPC_EP88XC=y CONFIG_PPC_EP88XC=y
CONFIG_8xx_COPYBACK=y
CONFIG_GEN_RTC=y CONFIG_GEN_RTC=y
CONFIG_HZ_100=y CONFIG_HZ_100=y
# CONFIG_SECCOMP is not set # CONFIG_SECCOMP is not set

1
arch/powerpc/configs/mpc866_ads_defconfig
View File

@ -12,7 +12,6 @@ CONFIG_EXPERT=y
# CONFIG_BLK_DEV_BSG is not set # CONFIG_BLK_DEV_BSG is not set
CONFIG_PARTITION_ADVANCED=y CONFIG_PARTITION_ADVANCED=y
CONFIG_MPC86XADS=y CONFIG_MPC86XADS=y
CONFIG_8xx_COPYBACK=y
CONFIG_GEN_RTC=y CONFIG_GEN_RTC=y
CONFIG_HZ_1000=y CONFIG_HZ_1000=y
CONFIG_MATH_EMULATION=y CONFIG_MATH_EMULATION=y

1
arch/powerpc/configs/mpc885_ads_defconfig
View File

@ -11,7 +11,6 @@ CONFIG_EXPERT=y
# CONFIG_VM_EVENT_COUNTERS is not set # CONFIG_VM_EVENT_COUNTERS is not set
# CONFIG_BLK_DEV_BSG is not set # CONFIG_BLK_DEV_BSG is not set
CONFIG_PARTITION_ADVANCED=y CONFIG_PARTITION_ADVANCED=y
CONFIG_8xx_COPYBACK=y
CONFIG_GEN_RTC=y CONFIG_GEN_RTC=y
CONFIG_HZ_100=y CONFIG_HZ_100=y
# CONFIG_SECCOMP is not set # CONFIG_SECCOMP is not set

1
arch/powerpc/configs/tqm8xx_defconfig
View File

@ -15,7 +15,6 @@ CONFIG_MODULE_SRCVERSION_ALL=y
# CONFIG_BLK_DEV_BSG is not set # CONFIG_BLK_DEV_BSG is not set
CONFIG_PARTITION_ADVANCED=y CONFIG_PARTITION_ADVANCED=y
CONFIG_TQM8XX=y CONFIG_TQM8XX=y
CONFIG_8xx_COPYBACK=y
# CONFIG_8xx_CPU15 is not set # CONFIG_8xx_CPU15 is not set
CONFIG_GEN_RTC=y CONFIG_GEN_RTC=y
CONFIG_HZ_100=y CONFIG_HZ_100=y

2
arch/powerpc/include/asm/nohash/32/mmu-8xx.h
View File

@ -19,7 +19,6 @@
#define MI_RSV4I 0x08000000 /* Reserve 4 TLB entries */ #define MI_RSV4I 0x08000000 /* Reserve 4 TLB entries */
#define MI_PPCS 0x02000000 /* Use MI_RPN prob/priv state */ #define MI_PPCS 0x02000000 /* Use MI_RPN prob/priv state */
#define MI_IDXMASK 0x00001f00 /* TLB index to be loaded */ #define MI_IDXMASK 0x00001f00 /* TLB index to be loaded */
#define MI_RESETVAL 0x00000000 /* Value of register at reset */
/* These are the Ks and Kp from the PowerPC books. For proper operation, /* These are the Ks and Kp from the PowerPC books. For proper operation,
* Ks = 0, Kp = 1. * Ks = 0, Kp = 1.
@ -95,7 +94,6 @@
#define MD_TWAM 0x04000000 /* Use 4K page hardware assist */ #define MD_TWAM 0x04000000 /* Use 4K page hardware assist */
#define MD_PPCS 0x02000000 /* Use MI_RPN prob/priv state */ #define MD_PPCS 0x02000000 /* Use MI_RPN prob/priv state */
#define MD_IDXMASK 0x00001f00 /* TLB index to be loaded */ #define MD_IDXMASK 0x00001f00 /* TLB index to be loaded */
#define MD_RESETVAL 0x04000000 /* Value of register at reset */
#define SPRN_M_CASID 793 /* Address space ID (context) to match */ #define SPRN_M_CASID 793 /* Address space ID (context) to match */
#define MC_ASIDMASK 0x0000000f /* Bits used for ASID value */ #define MC_ASIDMASK 0x0000000f /* Bits used for ASID value */

15
arch/powerpc/kernel/head_8xx.S
View File

@ -779,10 +779,7 @@ start_here:
initial_mmu: initial_mmu:
li r8, 0 li r8, 0
mtspr SPRN_MI_CTR, r8 /* remove PINNED ITLB entries */ mtspr SPRN_MI_CTR, r8 /* remove PINNED ITLB entries */
lis r10, MD_RESETVAL@h lis r10, MD_TWAM@h
#ifndef CONFIG_8xx_COPYBACK
oris r10, r10, MD_WTDEF@h
#endif
mtspr SPRN_MD_CTR, r10 /* remove PINNED DTLB entries */ mtspr SPRN_MD_CTR, r10 /* remove PINNED DTLB entries */
tlbia /* Invalidate all TLB entries */ tlbia /* Invalidate all TLB entries */
@ -857,17 +854,7 @@ initial_mmu:
mtspr SPRN_DC_CST, r8 mtspr SPRN_DC_CST, r8
lis r8, IDC_ENABLE@h lis r8, IDC_ENABLE@h
mtspr SPRN_IC_CST, r8 mtspr SPRN_IC_CST, r8
#ifdef CONFIG_8xx_COPYBACK
mtspr SPRN_DC_CST, r8 mtspr SPRN_DC_CST, r8
#else
/* For a debug option, I left this here to easily enable
* the write through cache mode
*/
lis r8, DC_SFWT@h
mtspr SPRN_DC_CST, r8
lis r8, IDC_ENABLE@h
mtspr SPRN_DC_CST, r8
#endif
/* Disable debug mode entry on breakpoints */ /* Disable debug mode entry on breakpoints */
mfspr r8, SPRN_DER mfspr r8, SPRN_DER
#ifdef CONFIG_PERF_EVENTS #ifdef CONFIG_PERF_EVENTS

9
arch/powerpc/platforms/8xx/Kconfig
View File

@ -98,15 +98,6 @@ menu "MPC8xx CPM Options"
# 8xx specific questions. # 8xx specific questions.
comment "Generic MPC8xx Options" comment "Generic MPC8xx Options"
config 8xx_COPYBACK
bool "Copy-Back Data Cache (else Writethrough)"
help
Saying Y here will cause the cache on an MPC8xx processor to be used
in Copy-Back mode. If you say N here, it is used in Writethrough
mode.
If in doubt, say Y here.
config 8xx_GPIO config 8xx_GPIO
bool "GPIO API Support" bool "GPIO API Support"
select GPIOLIB select GPIOLIB