mmc: sdhci-pci-gli: Enable SSC at 50MHz and 100MHz for GL9750 and GL9755
Enable SSC function at 50MHz and 100MHz for GL9750 and GL9755. Signed-off-by: Ben Chuang <ben.chuang@genesyslogic.com.tw> Link: https://lore.kernel.org/r/20220119075339.36281-1-benchuanggli@gmail.com Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
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@ -397,6 +397,20 @@ static void gl9750_set_ssc_pll_205mhz(struct sdhci_host *host)
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gl9750_set_pll(host, 0x1, 0x246, 0x0);
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}
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static void gl9750_set_ssc_pll_100mhz(struct sdhci_host *host)
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{
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/* set pll to 100MHz and enable ssc */
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gl9750_set_ssc(host, 0x1, 0xE, 0x51EC);
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gl9750_set_pll(host, 0x1, 0x244, 0x1);
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}
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static void gl9750_set_ssc_pll_50mhz(struct sdhci_host *host)
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{
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/* set pll to 50MHz and enable ssc */
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gl9750_set_ssc(host, 0x1, 0xE, 0x51EC);
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gl9750_set_pll(host, 0x1, 0x244, 0x3);
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}
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static void sdhci_gl9750_set_clock(struct sdhci_host *host, unsigned int clock)
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{
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struct mmc_ios *ios = &host->mmc->ios;
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@ -414,6 +428,10 @@ static void sdhci_gl9750_set_clock(struct sdhci_host *host, unsigned int clock)
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if (clock == 200000000 && ios->timing == MMC_TIMING_UHS_SDR104) {
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host->mmc->actual_clock = 205000000;
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gl9750_set_ssc_pll_205mhz(host);
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} else if (clock == 100000000) {
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gl9750_set_ssc_pll_100mhz(host);
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} else if (clock == 50000000) {
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gl9750_set_ssc_pll_50mhz(host);
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}
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sdhci_enable_clk(host, clk);
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@ -540,6 +558,20 @@ static void gl9755_set_ssc_pll_205mhz(struct pci_dev *pdev)
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gl9755_set_pll(pdev, 0x1, 0x246, 0x0);
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}
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static void gl9755_set_ssc_pll_100mhz(struct pci_dev *pdev)
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{
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/* set pll to 100MHz and enable ssc */
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gl9755_set_ssc(pdev, 0x1, 0xE, 0x51EC);
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gl9755_set_pll(pdev, 0x1, 0x244, 0x1);
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}
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static void gl9755_set_ssc_pll_50mhz(struct pci_dev *pdev)
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{
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/* set pll to 50MHz and enable ssc */
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gl9755_set_ssc(pdev, 0x1, 0xE, 0x51EC);
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gl9755_set_pll(pdev, 0x1, 0x244, 0x3);
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}
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static void sdhci_gl9755_set_clock(struct sdhci_host *host, unsigned int clock)
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{
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struct sdhci_pci_slot *slot = sdhci_priv(host);
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@ -560,6 +592,10 @@ static void sdhci_gl9755_set_clock(struct sdhci_host *host, unsigned int clock)
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if (clock == 200000000 && ios->timing == MMC_TIMING_UHS_SDR104) {
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host->mmc->actual_clock = 205000000;
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gl9755_set_ssc_pll_205mhz(pdev);
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} else if (clock == 100000000) {
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gl9755_set_ssc_pll_100mhz(pdev);
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} else if (clock == 50000000) {
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gl9755_set_ssc_pll_50mhz(pdev);
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}
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sdhci_enable_clk(host, clk);
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