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drm/nouveau/mc: take nvkm_device as argument to public functions 

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
This commit is contained in:
Ben Skeggs 2016-05-30 08:17:58 +10:00
parent d6adbe949d
commit d398119034
9 changed files with 50 additions and 46 deletions
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10
drivers/gpu/drm/nouveau/include/nvkm/subdev/mc.h
View File

@ -7,11 +7,11 @@ struct nvkm_mc {
struct nvkm_subdev subdev;
};
void nvkm_mc_intr(struct nvkm_mc *, bool *handled);
void nvkm_mc_intr_unarm(struct nvkm_mc *);
void nvkm_mc_intr_rearm(struct nvkm_mc *);
void nvkm_mc_reset(struct nvkm_mc *, enum nvkm_devidx);
void nvkm_mc_unk260(struct nvkm_mc *, u32 data);
void nvkm_mc_intr(struct nvkm_device *, bool *handled);
void nvkm_mc_intr_unarm(struct nvkm_device *);
void nvkm_mc_intr_rearm(struct nvkm_device *);
void nvkm_mc_reset(struct nvkm_device *, enum nvkm_devidx);
void nvkm_mc_unk260(struct nvkm_device *, u32 data);
int nv04_mc_new(struct nvkm_device *, int, struct nvkm_mc **);
int nv11_mc_new(struct nvkm_device *, int, struct nvkm_mc **);

2
drivers/gpu/drm/nouveau/nvkm/core/subdev.c
View File

@ -105,7 +105,7 @@ nvkm_subdev_fini(struct nvkm_subdev *subdev, bool suspend)
}
}
nvkm_mc_reset(device->mc, subdev->index);
nvkm_mc_reset(device, subdev->index);
time = ktime_to_us(ktime_get()) - time;
nvkm_trace(subdev, "%s completed in %lldus\n", action, time);

10
drivers/gpu/drm/nouveau/nvkm/engine/device/tegra.c
View File

@ -191,13 +191,11 @@ static irqreturn_t
nvkm_device_tegra_intr(int irq, void *arg)
{
struct nvkm_device_tegra *tdev = arg;
struct nvkm_mc *mc = tdev->device.mc;
struct nvkm_device *device = &tdev->device;
bool handled = false;
if (likely(mc)) {
nvkm_mc_intr_unarm(mc);
nvkm_mc_intr(mc, &handled);
nvkm_mc_intr_rearm(mc);
}
nvkm_mc_intr_unarm(device);
nvkm_mc_intr(device, &handled);
nvkm_mc_intr_rearm(device);
return handled ? IRQ_HANDLED : IRQ_NONE;
}

4
drivers/gpu/drm/nouveau/nvkm/engine/gr/ctxgf100.c
View File

@ -1240,7 +1240,7 @@ gf100_grctx_generate_main(struct gf100_gr *gr, struct gf100_grctx *info)
const struct gf100_grctx_func *grctx = gr->func->grctx;
u32 idle_timeout;
nvkm_mc_unk260(device->mc, 0);
nvkm_mc_unk260(device, 0);
gf100_gr_mmio(gr, grctx->hub);
gf100_gr_mmio(gr, grctx->gpc);
@ -1264,7 +1264,7 @@ gf100_grctx_generate_main(struct gf100_gr *gr, struct gf100_grctx *info)
gf100_gr_icmd(gr, grctx->icmd);
nvkm_wr32(device, 0x404154, idle_timeout);
gf100_gr_mthd(gr, grctx->mthd);
nvkm_mc_unk260(device->mc, 1);
nvkm_mc_unk260(device, 1);
}
int

4
drivers/gpu/drm/nouveau/nvkm/engine/gr/ctxgf117.c
View File

@ -226,7 +226,7 @@ gf117_grctx_generate_main(struct gf100_gr *gr, struct gf100_grctx *info)
u32 idle_timeout;
int i;
nvkm_mc_unk260(device->mc, 0);
nvkm_mc_unk260(device, 0);
gf100_gr_mmio(gr, grctx->hub);
gf100_gr_mmio(gr, grctx->gpc);
@ -253,7 +253,7 @@ gf117_grctx_generate_main(struct gf100_gr *gr, struct gf100_grctx *info)
gf100_gr_icmd(gr, grctx->icmd);
nvkm_wr32(device, 0x404154, idle_timeout);
gf100_gr_mthd(gr, grctx->mthd);
nvkm_mc_unk260(device->mc, 1);
nvkm_mc_unk260(device, 1);
}
const struct gf100_grctx_func

4
drivers/gpu/drm/nouveau/nvkm/engine/gr/ctxgk104.c
View File

@ -950,7 +950,7 @@ gk104_grctx_generate_main(struct gf100_gr *gr, struct gf100_grctx *info)
u32 idle_timeout;
int i;
nvkm_mc_unk260(device->mc, 0);
nvkm_mc_unk260(device, 0);
gf100_gr_mmio(gr, grctx->hub);
gf100_gr_mmio(gr, grctx->gpc);
@ -979,7 +979,7 @@ gk104_grctx_generate_main(struct gf100_gr *gr, struct gf100_grctx *info)
gf100_gr_icmd(gr, grctx->icmd);
nvkm_wr32(device, 0x404154, idle_timeout);
gf100_gr_mthd(gr, grctx->mthd);
nvkm_mc_unk260(device->mc, 1);
nvkm_mc_unk260(device, 1);
nvkm_mask(device, 0x418800, 0x00200000, 0x00200000);
nvkm_mask(device, 0x41be10, 0x00800000, 0x00800000);

8
drivers/gpu/drm/nouveau/nvkm/engine/gr/gf100.c
View File

@ -1460,7 +1460,7 @@ gf100_gr_init_ctxctl(struct gf100_gr *gr)
if (gr->firmware) {
/* load fuc microcode */
nvkm_mc_unk260(device->mc, 0);
nvkm_mc_unk260(device, 0);
/* securely-managed falcons must be reset using secure boot */
if (nvkm_secboot_is_managed(sb, NVKM_SECBOOT_FALCON_FECS))
@ -1474,7 +1474,7 @@ gf100_gr_init_ctxctl(struct gf100_gr *gr)
gf100_gr_init_fw(gr, 0x41a000, &gr->fuc41ac,
&gr->fuc41ad);
nvkm_mc_unk260(device->mc, 1);
nvkm_mc_unk260(device, 1);
/* start both of them running */
nvkm_wr32(device, 0x409840, 0xffffffff);
@ -1576,7 +1576,7 @@ gf100_gr_init_ctxctl(struct gf100_gr *gr)
}
/* load HUB microcode */
nvkm_mc_unk260(device->mc, 0);
nvkm_mc_unk260(device, 0);
nvkm_wr32(device, 0x4091c0, 0x01000000);
for (i = 0; i < gr->func->fecs.ucode->data.size / 4; i++)
nvkm_wr32(device, 0x4091c4, gr->func->fecs.ucode->data.data[i]);
@ -1599,7 +1599,7 @@ gf100_gr_init_ctxctl(struct gf100_gr *gr)
nvkm_wr32(device, 0x41a188, i >> 6);
nvkm_wr32(device, 0x41a184, gr->func->gpccs.ucode->code.data[i]);
}
nvkm_mc_unk260(device->mc, 1);
nvkm_mc_unk260(device, 1);
/* load register lists */
gf100_gr_init_csdata(gr, grctx->hub, 0x409000, 0x000, 0x000000);

40
drivers/gpu/drm/nouveau/nvkm/subdev/mc/base.c
View File

@ -27,22 +27,27 @@
#include <subdev/top.h>
void
nvkm_mc_unk260(struct nvkm_mc *mc, u32 data)
nvkm_mc_unk260(struct nvkm_device *device, u32 data)
{
if (mc->func->unk260)
struct nvkm_mc *mc = device->mc;
if (likely(mc) && mc->func->unk260)
mc->func->unk260(mc, data);
}
void
nvkm_mc_intr_unarm(struct nvkm_mc *mc)
nvkm_mc_intr_unarm(struct nvkm_device *device)
{
return mc->func->intr_unarm(mc);
struct nvkm_mc *mc = device->mc;
if (likely(mc))
mc->func->intr_unarm(mc);
}
void
nvkm_mc_intr_rearm(struct nvkm_mc *mc)
nvkm_mc_intr_rearm(struct nvkm_device *device)
{
return mc->func->intr_rearm(mc);
struct nvkm_mc *mc = device->mc;
if (likely(mc))
mc->func->intr_rearm(mc);
}
static u32
@ -55,14 +60,18 @@ nvkm_mc_intr_mask(struct nvkm_mc *mc)
}
void
nvkm_mc_intr(struct nvkm_mc *mc, bool *handled)
nvkm_mc_intr(struct nvkm_device *device, bool *handled)
{
struct nvkm_device *device = mc->subdev.device;
struct nvkm_mc *mc = device->mc;
struct nvkm_subdev *subdev;
const struct nvkm_mc_map *map = mc->func->intr;
u32 stat, intr = nvkm_mc_intr_mask(mc);
const struct nvkm_mc_map *map;
u32 stat, intr;
u64 subdevs;
if (unlikely(!mc))
return;
intr = nvkm_mc_intr_mask(mc);
stat = nvkm_top_intr(device, intr, &subdevs);
while (subdevs) {
enum nvkm_devidx subidx = __ffs64(subdevs);
@ -72,14 +81,13 @@ nvkm_mc_intr(struct nvkm_mc *mc, bool *handled)
subdevs &= ~BIT_ULL(subidx);
}
while (map->stat) {
for (map = mc->func->intr; map->stat; map++) {
if (intr & map->stat) {
subdev = nvkm_device_subdev(device, map->unit);
if (subdev)
nvkm_subdev_intr(subdev);
stat &= ~map->stat;
}
map++;
}
if (stat)
@ -111,8 +119,9 @@ nvkm_mc_reset_(struct nvkm_mc *mc, enum nvkm_devidx devidx)
}
void
nvkm_mc_reset(struct nvkm_mc *mc, enum nvkm_devidx devidx)
nvkm_mc_reset(struct nvkm_device *device, enum nvkm_devidx devidx)
{
struct nvkm_mc *mc = device->mc;
if (likely(mc))
nvkm_mc_reset_(mc, devidx);
}
@ -120,8 +129,7 @@ nvkm_mc_reset(struct nvkm_mc *mc, enum nvkm_devidx devidx)
static int
nvkm_mc_fini(struct nvkm_subdev *subdev, bool suspend)
{
struct nvkm_mc *mc = nvkm_mc(subdev);
nvkm_mc_intr_unarm(mc);
nvkm_mc_intr_unarm(subdev->device);
return 0;
}
@ -131,7 +139,7 @@ nvkm_mc_init(struct nvkm_subdev *subdev)
struct nvkm_mc *mc = nvkm_mc(subdev);
if (mc->func->init)
mc->func->init(mc);
nvkm_mc_intr_rearm(mc);
nvkm_mc_intr_rearm(subdev->device);
return 0;
}

14
drivers/gpu/drm/nouveau/nvkm/subdev/pci/base.c
View File

@ -69,15 +69,13 @@ static irqreturn_t
nvkm_pci_intr(int irq, void *arg)
{
struct nvkm_pci *pci = arg;
struct nvkm_mc *mc = pci->subdev.device->mc;
struct nvkm_device *device = pci->subdev.device;
bool handled = false;
if (likely(mc)) {
nvkm_mc_intr_unarm(mc);
if (pci->msi)
pci->func->msi_rearm(pci);
nvkm_mc_intr(mc, &handled);
nvkm_mc_intr_rearm(mc);
}
nvkm_mc_intr_unarm(device);
if (pci->msi)
pci->func->msi_rearm(pci);
nvkm_mc_intr(device, &handled);
nvkm_mc_intr_rearm(device);
return handled ? IRQ_HANDLED : IRQ_NONE;
}