KVM: PPC: Book3S: Change interrupt call to reduce scratch space use on HV
Change the calling convention to put the trap number together with CR in two halves of r12, which frees up HSTATE_SCRATCH2 in the HV handler. The 64-bit PR handler entry translates the calling convention back to match the previous call convention (i.e., shared with 32-bit), for simplicity. Signed-off-by: Nicholas Piggin <npiggin@gmail.com> Acked-by: Paul Mackerras <paulus@ozlabs.org> Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
This commit is contained in:
Nicholas Piggin
Michael Ellerman
parent
49def18533
commit
d3918e7fd4
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@ -233,7 +233,7 @@ END_FTR_SECTION_NESTED(ftr,ftr,943)
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#endif
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#define __KVM_HANDLER_PROLOG(area, n) \
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#define __KVM_HANDLER(area, h, n) \
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BEGIN_FTR_SECTION_NESTED(947) \
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ld r10,area+EX_CFAR(r13); \
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std r10,HSTATE_CFAR(r13); \
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@ -243,30 +243,28 @@ END_FTR_SECTION_NESTED(ftr,ftr,943)
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std r10,HSTATE_PPR(r13); \
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END_FTR_SECTION_NESTED(CPU_FTR_HAS_PPR,CPU_FTR_HAS_PPR,948); \
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ld r10,area+EX_R10(r13); \
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stw r9,HSTATE_SCRATCH1(r13); \
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ld r9,area+EX_R9(r13); \
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std r12,HSTATE_SCRATCH0(r13); \
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#define __KVM_HANDLER(area, h, n) \
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__KVM_HANDLER_PROLOG(area, n) \
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li r12,n; \
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sldi r12,r9,32; \
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ori r12,r12,(n); \
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ld r9,area+EX_R9(r13); \
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b kvmppc_interrupt
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#define __KVM_HANDLER_SKIP(area, h, n) \
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cmpwi r10,KVM_GUEST_MODE_SKIP; \
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ld r10,area+EX_R10(r13); \
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beq 89f; \
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stw r9,HSTATE_SCRATCH1(r13); \
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BEGIN_FTR_SECTION_NESTED(948) \
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ld r9,area+EX_PPR(r13); \
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std r9,HSTATE_PPR(r13); \
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ld r10,area+EX_PPR(r13); \
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std r10,HSTATE_PPR(r13); \
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END_FTR_SECTION_NESTED(CPU_FTR_HAS_PPR,CPU_FTR_HAS_PPR,948); \
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ld r9,area+EX_R9(r13); \
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ld r10,area+EX_R10(r13); \
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std r12,HSTATE_SCRATCH0(r13); \
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li r12,n; \
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sldi r12,r9,32; \
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ori r12,r12,(n); \
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ld r9,area+EX_R9(r13); \
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b kvmppc_interrupt; \
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89: mtocrf 0x80,r9; \
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ld r9,area+EX_R9(r13); \
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ld r10,area+EX_R10(r13); \
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b kvmppc_skip_##h##interrupt
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#ifdef CONFIG_KVM_BOOK3S_64_HANDLER
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@ -1057,19 +1057,18 @@ hdec_soon:
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kvmppc_interrupt_hv:
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/*
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* Register contents:
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* R12 = interrupt vector
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* R12 = (guest CR << 32) | interrupt vector
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* R13 = PACA
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* guest CR, R12 saved in shadow VCPU SCRATCH1/0
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* guest R12 saved in shadow VCPU SCRATCH0
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* guest R13 saved in SPRN_SCRATCH0
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*/
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std r9, HSTATE_SCRATCH2(r13)
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std r9, HSTATE_SCRATCH1(r13)
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lbz r9, HSTATE_IN_GUEST(r13)
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cmpwi r9, KVM_GUEST_MODE_HOST_HV
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beq kvmppc_bad_host_intr
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#ifdef CONFIG_KVM_BOOK3S_PR_POSSIBLE
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cmpwi r9, KVM_GUEST_MODE_GUEST
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ld r9, HSTATE_SCRATCH2(r13)
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ld r9, HSTATE_SCRATCH1(r13)
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beq kvmppc_interrupt_pr
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#endif
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/* We're now back in the host but in guest MMU context */
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@ -1089,13 +1088,14 @@ kvmppc_interrupt_hv:
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std r6, VCPU_GPR(R6)(r9)
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std r7, VCPU_GPR(R7)(r9)
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std r8, VCPU_GPR(R8)(r9)
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ld r0, HSTATE_SCRATCH2(r13)
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ld r0, HSTATE_SCRATCH1(r13)
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std r0, VCPU_GPR(R9)(r9)
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std r10, VCPU_GPR(R10)(r9)
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std r11, VCPU_GPR(R11)(r9)
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ld r3, HSTATE_SCRATCH0(r13)
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lwz r4, HSTATE_SCRATCH1(r13)
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std r3, VCPU_GPR(R12)(r9)
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/* CR is in the high half of r12 */
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srdi r4, r12, 32
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stw r4, VCPU_CR(r9)
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BEGIN_FTR_SECTION
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ld r3, HSTATE_CFAR(r13)
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@ -1114,6 +1114,8 @@ END_FTR_SECTION_IFSET(CPU_FTR_HAS_PPR)
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mfspr r11, SPRN_SRR1
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std r10, VCPU_SRR0(r9)
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std r11, VCPU_SRR1(r9)
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/* trap is in the low half of r12, clear CR from the high half */
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clrldi r12, r12, 32
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andi. r0, r12, 2 /* need to read HSRR0/1? */
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beq 1f
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mfspr r10, SPRN_HSRR0
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@ -167,20 +167,31 @@ kvmppc_handler_trampoline_enter_end:
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* *
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*****************************************************************************/
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.global kvmppc_handler_trampoline_exit
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kvmppc_handler_trampoline_exit:
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.global kvmppc_interrupt_pr
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kvmppc_interrupt_pr:
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/* 64-bit entry. Register usage at this point:
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*
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* SPRG_SCRATCH0 = guest R13
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* R12 = (guest CR << 32) | exit handler id
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* R13 = PACA
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* HSTATE.SCRATCH0 = guest R12
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*/
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#ifdef CONFIG_PPC64
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/* Match 32-bit entry */
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rotldi r12, r12, 32 /* Flip R12 halves for stw */
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stw r12, HSTATE_SCRATCH1(r13) /* CR is now in the low half */
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srdi r12, r12, 32 /* shift trap into low half */
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#endif
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.global kvmppc_handler_trampoline_exit
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kvmppc_handler_trampoline_exit:
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/* Register usage at this point:
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*
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* SPRG_SCRATCH0 = guest R13
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* R12 = exit handler id
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* R13 = shadow vcpu (32-bit) or PACA (64-bit)
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* SPRG_SCRATCH0 = guest R13
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* R12 = exit handler id
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* R13 = shadow vcpu (32-bit) or PACA (64-bit)
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* HSTATE.SCRATCH0 = guest R12
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* HSTATE.SCRATCH1 = guest CR
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*
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*/
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/* Save registers */
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