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drm/i915: Unduplicate i915_ggtt_unbind/bind_vma 

ggtt_bind/unbind_vma already has checks for aliasing ppgtt or not,
there's nothing else magic they do. Resurrect i915_ggtt_insert_entries
to make the reuse possibel.

Reviewed-by: Mika Kuoppala <mika.kuoppala@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
This commit is contained in:
Daniel Vetter 2015-04-14 17:35:25 +02:00
parent 4755265977
commit d369d2d968
1 changed files with 8 additions and 19 deletions
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27
drivers/gpu/drm/i915/i915_gem_gtt.c
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@ -1876,19 +1876,16 @@ static void gen6_ggtt_clear_range(struct i915_address_space *vm,
readl(gtt_base); readl(gtt_base);
} }
static void i915_ggtt_insert_entries(struct i915_address_space *vm,
static void i915_ggtt_bind_vma(struct i915_vma *vma, struct sg_table *pages,
enum i915_cache_level cache_level, uint64_t start,
u32 unused) enum i915_cache_level cache_level, u32 unused)
{ {
const unsigned long entry = vma->node.start >> PAGE_SHIFT;
unsigned int flags = (cache_level == I915_CACHE_NONE) ? unsigned int flags = (cache_level == I915_CACHE_NONE) ?
AGP_USER_MEMORY : AGP_USER_CACHED_MEMORY; AGP_USER_MEMORY : AGP_USER_CACHED_MEMORY;
BUG_ON(!i915_is_ggtt(vma->vm)); intel_gtt_insert_sg_entries(pages, start >> PAGE_SHIFT, flags);
intel_gtt_insert_sg_entries(vma->ggtt_view.pages, entry, flags);
vma->bound |= GLOBAL_BIND;
} }
static void i915_ggtt_clear_range(struct i915_address_space *vm, static void i915_ggtt_clear_range(struct i915_address_space *vm,
@ -1901,15 +1898,6 @@ static void i915_ggtt_clear_range(struct i915_address_space *vm,
intel_gtt_clear_range(first_entry, num_entries); intel_gtt_clear_range(first_entry, num_entries);
} }
static void i915_ggtt_unbind_vma(struct i915_vma *vma)
{
const unsigned int first = vma->node.start >> PAGE_SHIFT;
const unsigned int size = vma->obj->base.size >> PAGE_SHIFT;
BUG_ON(!i915_is_ggtt(vma->vm));
intel_gtt_clear_range(first, size);
}
static void ggtt_bind_vma(struct i915_vma *vma, static void ggtt_bind_vma(struct i915_vma *vma,
enum i915_cache_level cache_level, enum i915_cache_level cache_level,
u32 flags) u32 flags)
@ -2471,9 +2459,10 @@ static int i915_gmch_probe(struct drm_device *dev,
intel_gtt_get(gtt_total, stolen, mappable_base, mappable_end); intel_gtt_get(gtt_total, stolen, mappable_base, mappable_end);
dev_priv->gtt.do_idle_maps = needs_idle_maps(dev_priv->dev); dev_priv->gtt.do_idle_maps = needs_idle_maps(dev_priv->dev);
dev_priv->gtt.base.insert_entries = i915_ggtt_insert_entries;
dev_priv->gtt.base.clear_range = i915_ggtt_clear_range; dev_priv->gtt.base.clear_range = i915_ggtt_clear_range;
dev_priv->gtt.base.bind_vma = i915_ggtt_bind_vma; dev_priv->gtt.base.bind_vma = ggtt_bind_vma;
dev_priv->gtt.base.unbind_vma = i915_ggtt_unbind_vma; dev_priv->gtt.base.unbind_vma = ggtt_unbind_vma;
if (unlikely(dev_priv->gtt.do_idle_maps)) if (unlikely(dev_priv->gtt.do_idle_maps))
DRM_INFO("applying Ironlake quirks for intel_iommu\n"); DRM_INFO("applying Ironlake quirks for intel_iommu\n");