Merge branch 'drm-fixes-3.18' of git://people.freedesktop.org/~agd5f/linux into drm-fixes
- dpm stability fixes for SI and KV - remove an invalid pci id - kmalloc_array fixes - minor cleanups * 'drm-fixes-3.18' of git://people.freedesktop.org/~agd5f/linux: drm/radeon: remove some buggy dead code drm/radeon: remove invalid pci id drm/radeon: dpm fixes for asrock systems radeon: clean up coding style differences in radeon_get_bios() drm/radeon: Use drm_malloc_ab instead of kmalloc_array drm/radeon/dpm: disable ulv support on SI
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commit
d34d4d8af8
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@ -3005,7 +3005,7 @@ static void evergreen_gpu_init(struct radeon_device *rdev)
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u32 vgt_cache_invalidation;
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u32 hdp_host_path_cntl, tmp;
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u32 disabled_rb_mask;
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int i, j, num_shader_engines, ps_thread_count;
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int i, j, ps_thread_count;
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switch (rdev->family) {
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case CHIP_CYPRESS:
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@ -3303,8 +3303,6 @@ static void evergreen_gpu_init(struct radeon_device *rdev)
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rdev->config.evergreen.tile_config |=
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((gb_addr_config & 0x30000000) >> 28) << 12;
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num_shader_engines = (gb_addr_config & NUM_SHADER_ENGINES(3) >> 12) + 1;
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if ((rdev->family >= CHIP_CEDAR) && (rdev->family <= CHIP_HEMLOCK)) {
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u32 efuse_straps_4;
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u32 efuse_straps_3;
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@ -2725,7 +2725,11 @@ int kv_dpm_init(struct radeon_device *rdev)
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pi->sram_end = SMC_RAM_END;
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pi->enable_nb_dpm = true;
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/* Enabling nb dpm on an asrock system prevents dpm from working */
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if (rdev->pdev->subsystem_vendor == 0x1849)
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pi->enable_nb_dpm = false;
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else
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pi->enable_nb_dpm = true;
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pi->caps_power_containment = true;
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pi->caps_cac = true;
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@ -2740,10 +2744,19 @@ int kv_dpm_init(struct radeon_device *rdev)
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pi->caps_sclk_ds = true;
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pi->enable_auto_thermal_throttling = true;
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pi->disable_nb_ps3_in_battery = false;
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if (radeon_bapm == 0)
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if (radeon_bapm == -1) {
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/* There are stability issues reported on with
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* bapm enabled on an asrock system.
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*/
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if (rdev->pdev->subsystem_vendor == 0x1849)
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pi->bapm_enable = false;
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else
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pi->bapm_enable = true;
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} else if (radeon_bapm == 0) {
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pi->bapm_enable = false;
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else
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} else {
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pi->bapm_enable = true;
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}
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pi->voltage_drop_t = 0;
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pi->caps_sclk_throttle_low_notification = false;
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pi->caps_fps = false; /* true? */
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@ -658,12 +658,10 @@ bool radeon_get_bios(struct radeon_device *rdev)
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r = igp_read_bios_from_vram(rdev);
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if (r == false)
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r = radeon_read_bios(rdev);
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if (r == false) {
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if (r == false)
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r = radeon_read_disabled_bios(rdev);
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}
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if (r == false) {
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if (r == false)
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r = radeon_read_platform_bios(rdev);
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}
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if (r == false || rdev->bios == NULL) {
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DRM_ERROR("Unable to locate a BIOS ROM\n");
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rdev->bios = NULL;
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@ -450,7 +450,7 @@ static void radeon_cs_parser_fini(struct radeon_cs_parser *parser, int error, bo
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kfree(parser->track);
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kfree(parser->relocs);
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kfree(parser->relocs_ptr);
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kfree(parser->vm_bos);
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drm_free_large(parser->vm_bos);
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for (i = 0; i < parser->nchunks; i++)
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drm_free_large(parser->chunks[i].kdata);
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kfree(parser->chunks);
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@ -314,7 +314,7 @@ unsigned radeon_ring_backup(struct radeon_device *rdev, struct radeon_ring *ring
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}
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/* and then save the content of the ring */
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*data = kmalloc_array(size, sizeof(uint32_t), GFP_KERNEL);
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*data = drm_malloc_ab(size, sizeof(uint32_t));
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if (!*data) {
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mutex_unlock(&rdev->ring_lock);
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return 0;
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@ -356,7 +356,7 @@ int radeon_ring_restore(struct radeon_device *rdev, struct radeon_ring *ring,
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}
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radeon_ring_unlock_commit(rdev, ring, false);
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kfree(data);
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drm_free_large(data);
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return 0;
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}
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@ -132,8 +132,8 @@ struct radeon_cs_reloc *radeon_vm_get_bos(struct radeon_device *rdev,
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struct radeon_cs_reloc *list;
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unsigned i, idx;
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list = kmalloc_array(vm->max_pde_used + 2,
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sizeof(struct radeon_cs_reloc), GFP_KERNEL);
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list = drm_malloc_ab(vm->max_pde_used + 2,
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sizeof(struct radeon_cs_reloc));
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if (!list)
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return NULL;
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@ -6256,7 +6256,7 @@ static void si_parse_pplib_clock_info(struct radeon_device *rdev,
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if ((rps->class2 & ATOM_PPLIB_CLASSIFICATION2_ULV) &&
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index == 0) {
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/* XXX disable for A0 tahiti */
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si_pi->ulv.supported = true;
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si_pi->ulv.supported = false;
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si_pi->ulv.pl = *pl;
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si_pi->ulv.one_pcie_lane_in_ulv = false;
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si_pi->ulv.volt_change_delay = SISLANDS_ULVVOLTAGECHANGEDELAY_DFLT;
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@ -74,7 +74,6 @@
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{0x1002, 0x4C64, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV250|RADEON_IS_MOBILITY}, \
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{0x1002, 0x4C66, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV250|RADEON_IS_MOBILITY}, \
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{0x1002, 0x4C67, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV250|RADEON_IS_MOBILITY}, \
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{0x1002, 0x4C6E, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV280|RADEON_IS_MOBILITY}, \
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{0x1002, 0x4E44, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_R300}, \
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{0x1002, 0x4E45, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_R300}, \
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{0x1002, 0x4E46, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_R300}, \
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