kvm: x86: hyperv: make VP_INDEX managed by userspace
Hyper-V identifies vCPUs by Virtual Processor Index, which can be queried via HV_X64_MSR_VP_INDEX msr. It is defined by the spec as a sequential number which can't exceed the maximum number of vCPUs per VM. APIC ids can be sparse and thus aren't a valid replacement for VP indices. Current KVM uses its internal vcpu index as VP_INDEX. However, to make it predictable and persistent across VM migrations, the userspace has to control the value of VP_INDEX. This patch achieves that, by storing vp_index explicitly on vcpu, and allowing HV_X64_MSR_VP_INDEX to be set from the host side. For compatibility it's initialized to KVM vcpu index. Also a few variables are renamed to make clear distinction betweed this Hyper-V vp_index and KVM vcpu_id (== APIC id). Besides, a new capability, KVM_CAP_HYPERV_VP_INDEX, is added to allow the userspace to skip attempting msr writes where unsupported, to avoid spamming error logs. Signed-off-by: Roman Kagan <rkagan@virtuozzo.com> Signed-off-by: Radim Krčmář <rkrcmar@redhat.com>
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@ -4338,3 +4338,12 @@ This capability enables a newer version of Hyper-V Synthetic interrupt
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controller (SynIC). The only difference with KVM_CAP_HYPERV_SYNIC is that KVM
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doesn't clear SynIC message and event flags pages when they are enabled by
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writing to the respective MSRs.
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8.12 KVM_CAP_HYPERV_VP_INDEX
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Architectures: x86
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This capability indicates that userspace can load HV_X64_MSR_VP_INDEX msr. Its
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value is used to denote the target vcpu for a SynIC interrupt. For
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compatibilty, KVM initializes this msr to KVM's internal vcpu index. When this
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capability is absent, userspace can still query this msr's value.
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@ -467,6 +467,7 @@ struct kvm_vcpu_hv_synic {
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/* Hyper-V per vcpu emulation context */
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struct kvm_vcpu_hv {
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u32 vp_index;
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u64 hv_vapic;
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s64 runtime_offset;
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struct kvm_vcpu_hv_synic synic;
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@ -106,14 +106,27 @@ static int synic_set_sint(struct kvm_vcpu_hv_synic *synic, int sint,
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return 0;
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}
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static struct kvm_vcpu_hv_synic *synic_get(struct kvm *kvm, u32 vcpu_id)
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static struct kvm_vcpu *get_vcpu_by_vpidx(struct kvm *kvm, u32 vpidx)
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{
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struct kvm_vcpu *vcpu = NULL;
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int i;
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if (vpidx < KVM_MAX_VCPUS)
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vcpu = kvm_get_vcpu(kvm, vpidx);
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if (vcpu && vcpu_to_hv_vcpu(vcpu)->vp_index == vpidx)
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return vcpu;
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kvm_for_each_vcpu(i, vcpu, kvm)
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if (vcpu_to_hv_vcpu(vcpu)->vp_index == vpidx)
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return vcpu;
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return NULL;
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}
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static struct kvm_vcpu_hv_synic *synic_get(struct kvm *kvm, u32 vpidx)
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{
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struct kvm_vcpu *vcpu;
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struct kvm_vcpu_hv_synic *synic;
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if (vcpu_id >= atomic_read(&kvm->online_vcpus))
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return NULL;
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vcpu = kvm_get_vcpu(kvm, vcpu_id);
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vcpu = get_vcpu_by_vpidx(kvm, vpidx);
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if (!vcpu)
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return NULL;
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synic = vcpu_to_synic(vcpu);
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@ -320,11 +333,11 @@ static int synic_set_irq(struct kvm_vcpu_hv_synic *synic, u32 sint)
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return ret;
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}
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int kvm_hv_synic_set_irq(struct kvm *kvm, u32 vcpu_id, u32 sint)
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int kvm_hv_synic_set_irq(struct kvm *kvm, u32 vpidx, u32 sint)
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{
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struct kvm_vcpu_hv_synic *synic;
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synic = synic_get(kvm, vcpu_id);
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synic = synic_get(kvm, vpidx);
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if (!synic)
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return -EINVAL;
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@ -343,11 +356,11 @@ void kvm_hv_synic_send_eoi(struct kvm_vcpu *vcpu, int vector)
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kvm_hv_notify_acked_sint(vcpu, i);
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}
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static int kvm_hv_set_sint_gsi(struct kvm *kvm, u32 vcpu_id, u32 sint, int gsi)
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static int kvm_hv_set_sint_gsi(struct kvm *kvm, u32 vpidx, u32 sint, int gsi)
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{
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struct kvm_vcpu_hv_synic *synic;
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synic = synic_get(kvm, vcpu_id);
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synic = synic_get(kvm, vpidx);
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if (!synic)
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return -EINVAL;
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@ -689,6 +702,13 @@ void kvm_hv_vcpu_init(struct kvm_vcpu *vcpu)
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stimer_init(&hv_vcpu->stimer[i], i);
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}
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void kvm_hv_vcpu_postcreate(struct kvm_vcpu *vcpu)
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{
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struct kvm_vcpu_hv *hv_vcpu = vcpu_to_hv_vcpu(vcpu);
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hv_vcpu->vp_index = kvm_vcpu_get_idx(vcpu);
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}
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int kvm_hv_activate_synic(struct kvm_vcpu *vcpu, bool dont_zero_synic_pages)
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{
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struct kvm_vcpu_hv_synic *synic = vcpu_to_synic(vcpu);
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@ -983,6 +1003,11 @@ static int kvm_hv_set_msr(struct kvm_vcpu *vcpu, u32 msr, u64 data, bool host)
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struct kvm_vcpu_hv *hv = &vcpu->arch.hyperv;
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switch (msr) {
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case HV_X64_MSR_VP_INDEX:
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if (!host)
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return 1;
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hv->vp_index = (u32)data;
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break;
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case HV_X64_MSR_APIC_ASSIST_PAGE: {
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u64 gfn;
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unsigned long addr;
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@ -1094,18 +1119,9 @@ static int kvm_hv_get_msr(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
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struct kvm_vcpu_hv *hv = &vcpu->arch.hyperv;
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switch (msr) {
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case HV_X64_MSR_VP_INDEX: {
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int r;
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struct kvm_vcpu *v;
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kvm_for_each_vcpu(r, v, vcpu->kvm) {
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if (v == vcpu) {
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data = r;
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break;
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}
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}
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case HV_X64_MSR_VP_INDEX:
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data = hv->vp_index;
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break;
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}
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case HV_X64_MSR_EOI:
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return kvm_hv_vapic_msr_read(vcpu, APIC_EOI, pdata);
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case HV_X64_MSR_ICR:
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@ -59,6 +59,7 @@ void kvm_hv_synic_send_eoi(struct kvm_vcpu *vcpu, int vector);
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int kvm_hv_activate_synic(struct kvm_vcpu *vcpu, bool dont_zero_synic_pages);
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void kvm_hv_vcpu_init(struct kvm_vcpu *vcpu);
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void kvm_hv_vcpu_postcreate(struct kvm_vcpu *vcpu);
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void kvm_hv_vcpu_uninit(struct kvm_vcpu *vcpu);
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static inline struct kvm_vcpu_hv_stimer *vcpu_to_stimer(struct kvm_vcpu *vcpu,
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@ -2666,6 +2666,7 @@ int kvm_vm_ioctl_check_extension(struct kvm *kvm, long ext)
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case KVM_CAP_HYPERV_SPIN:
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case KVM_CAP_HYPERV_SYNIC:
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case KVM_CAP_HYPERV_SYNIC2:
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case KVM_CAP_HYPERV_VP_INDEX:
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case KVM_CAP_PCI_SEGMENT:
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case KVM_CAP_DEBUGREGS:
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case KVM_CAP_X86_ROBUST_SINGLESTEP:
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@ -7688,6 +7689,8 @@ void kvm_arch_vcpu_postcreate(struct kvm_vcpu *vcpu)
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struct msr_data msr;
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struct kvm *kvm = vcpu->kvm;
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kvm_hv_vcpu_postcreate(vcpu);
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if (vcpu_load(vcpu))
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return;
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msr.data = 0x0;
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@ -928,6 +928,7 @@ struct kvm_ppc_resize_hpt {
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#define KVM_CAP_PPC_FWNMI 146
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#define KVM_CAP_PPC_SMT_POSSIBLE 147
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#define KVM_CAP_HYPERV_SYNIC2 148
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#define KVM_CAP_HYPERV_VP_INDEX 149
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#ifdef KVM_CAP_IRQ_ROUTING
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