drm/radeon/kms: fix typo in r600 cs checker
Looks like a typo in:
drm/radeon/r600: fix tiling issues in CS checker.
(f30df2fad0
)
Signed-off-by: Alex Deucher <alexdeucher@gmail.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
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@ -315,7 +315,7 @@ static inline int r600_cs_track_validate_cb(struct radeon_cs_parser *p, int i)
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if (array_mode == V_0280A0_ARRAY_LINEAR_GENERAL) {
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/* the initial DDX does bad things with the CB size occasionally */
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/* it rounds up height too far for slice tile max but the BO is smaller */
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tmp = (height - 7) * 8 * bpe;
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tmp = (height - 7) * pitch * bpe;
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if ((tmp + track->cb_color_bo_offset[i]) > radeon_bo_size(track->cb_color_bo[i])) {
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dev_warn(p->dev, "%s offset[%d] %d %d %lu too big\n", __func__, i, track->cb_color_bo_offset[i], tmp, radeon_bo_size(track->cb_color_bo[i]));
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return -EINVAL;
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