soc: qcom: rpmpd: Make bindings assignments consistent
Currently the whitespace between [DT_BINDING] = &struct is all over the place.. some SoC structs have a space, others have a tab, others have N tabs.. Make that a single tab for everybody to keep things coherent. Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20230313-topic-rpmpd-v3-7-06a4f448ff90@linaro.org
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@ -642,16 +642,16 @@ static const struct rpmpd_desc msm8996_desc = {
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/* msm8998 RPM Power domains */
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static struct rpmpd *msm8998_rpmpds[] = {
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[MSM8998_VDDCX] = &cx_rwcx0_lvl,
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[MSM8998_VDDCX_AO] = &cx_rwcx0_lvl_ao,
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[MSM8998_VDDCX_VFL] = &cx_rwcx0_vfl,
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[MSM8998_VDDMX] = &mx_rwmx0_lvl,
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[MSM8998_VDDMX_AO] = &mx_rwmx0_lvl_ao,
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[MSM8998_VDDMX_VFL] = &mx_rwmx0_vfl,
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[MSM8998_SSCCX] = &ssc_cx_rwsc0_lvl,
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[MSM8998_SSCCX_VFL] = &ssc_cx_rwsc0_vfl,
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[MSM8998_SSCMX] = &ssc_mx_rwsm0_lvl,
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[MSM8998_SSCMX_VFL] = &ssc_mx_rwsm0_vfl,
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[MSM8998_VDDCX] = &cx_rwcx0_lvl,
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[MSM8998_VDDCX_AO] = &cx_rwcx0_lvl_ao,
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[MSM8998_VDDCX_VFL] = &cx_rwcx0_vfl,
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[MSM8998_VDDMX] = &mx_rwmx0_lvl,
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[MSM8998_VDDMX_AO] = &mx_rwmx0_lvl_ao,
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[MSM8998_VDDMX_VFL] = &mx_rwmx0_vfl,
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[MSM8998_SSCCX] = &ssc_cx_rwsc0_lvl,
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[MSM8998_SSCCX_VFL] = &ssc_cx_rwsc0_vfl,
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[MSM8998_SSCMX] = &ssc_mx_rwsm0_lvl,
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[MSM8998_SSCMX_VFL] = &ssc_mx_rwsm0_vfl,
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};
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static const struct rpmpd_desc msm8998_desc = {
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@ -662,13 +662,13 @@ static const struct rpmpd_desc msm8998_desc = {
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/* qcs404 RPM Power domains */
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static struct rpmpd *qcs404_rpmpds[] = {
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[QCS404_VDDMX] = &mx_rwmx0_lvl,
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[QCS404_VDDMX_AO] = &mx_rwmx0_lvl_ao,
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[QCS404_VDDMX_VFL] = &mx_rwmx0_vfl,
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[QCS404_LPICX] = &lpi_cx_rwlc0_lvl,
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[QCS404_LPICX_VFL] = &lpi_cx_rwlc0_vfl,
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[QCS404_LPIMX] = &lpi_mx_rwlm0_lvl,
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[QCS404_LPIMX_VFL] = &lpi_mx_rwlm0_vfl,
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[QCS404_VDDMX] = &mx_rwmx0_lvl,
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[QCS404_VDDMX_AO] = &mx_rwmx0_lvl_ao,
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[QCS404_VDDMX_VFL] = &mx_rwmx0_vfl,
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[QCS404_LPICX] = &lpi_cx_rwlc0_lvl,
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[QCS404_LPICX_VFL] = &lpi_cx_rwlc0_vfl,
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[QCS404_LPIMX] = &lpi_mx_rwlm0_lvl,
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[QCS404_LPIMX_VFL] = &lpi_mx_rwlm0_vfl,
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};
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static const struct rpmpd_desc qcs404_desc = {
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@ -679,16 +679,16 @@ static const struct rpmpd_desc qcs404_desc = {
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/* sdm660 RPM Power domains */
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static struct rpmpd *sdm660_rpmpds[] = {
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[SDM660_VDDCX] = &cx_rwcx0_lvl,
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[SDM660_VDDCX_AO] = &cx_rwcx0_lvl_ao,
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[SDM660_VDDCX_VFL] = &cx_rwcx0_vfl,
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[SDM660_VDDMX] = &mx_rwmx0_lvl,
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[SDM660_VDDMX_AO] = &mx_rwmx0_lvl_ao,
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[SDM660_VDDMX_VFL] = &mx_rwmx0_vfl,
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[SDM660_SSCCX] = &ssc_cx_rwlc0_lvl,
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[SDM660_SSCCX_VFL] = &ssc_cx_rwlc0_vfl,
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[SDM660_SSCMX] = &ssc_mx_rwlm0_lvl,
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[SDM660_SSCMX_VFL] = &ssc_mx_rwlm0_vfl,
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[SDM660_VDDCX] = &cx_rwcx0_lvl,
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[SDM660_VDDCX_AO] = &cx_rwcx0_lvl_ao,
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[SDM660_VDDCX_VFL] = &cx_rwcx0_vfl,
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[SDM660_VDDMX] = &mx_rwmx0_lvl,
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[SDM660_VDDMX_AO] = &mx_rwmx0_lvl_ao,
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[SDM660_VDDMX_VFL] = &mx_rwmx0_vfl,
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[SDM660_SSCCX] = &ssc_cx_rwlc0_lvl,
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[SDM660_SSCCX_VFL] = &ssc_cx_rwlc0_vfl,
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[SDM660_SSCMX] = &ssc_mx_rwlm0_lvl,
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[SDM660_SSCMX_VFL] = &ssc_mx_rwlm0_vfl,
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};
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static const struct rpmpd_desc sdm660_desc = {
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@ -699,14 +699,14 @@ static const struct rpmpd_desc sdm660_desc = {
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/* sm4250/6115 RPM Power domains */
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static struct rpmpd *sm6115_rpmpds[] = {
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[SM6115_VDDCX] = &cx_rwcx0_lvl,
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[SM6115_VDDCX_AO] = &cx_rwcx0_lvl_ao,
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[SM6115_VDDCX_VFL] = &cx_rwcx0_vfl,
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[SM6115_VDDMX] = &mx_rwmx0_lvl,
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[SM6115_VDDMX_AO] = &mx_rwmx0_lvl_ao,
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[SM6115_VDDMX_VFL] = &mx_rwmx0_vfl,
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[SM6115_VDD_LPI_CX] = &lpi_cx_rwlc0_lvl,
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[SM6115_VDD_LPI_MX] = &lpi_mx_rwlm0_lvl,
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[SM6115_VDDCX] = &cx_rwcx0_lvl,
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[SM6115_VDDCX_AO] = &cx_rwcx0_lvl_ao,
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[SM6115_VDDCX_VFL] = &cx_rwcx0_vfl,
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[SM6115_VDDMX] = &mx_rwmx0_lvl,
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[SM6115_VDDMX_AO] = &mx_rwmx0_lvl_ao,
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[SM6115_VDDMX_VFL] = &mx_rwmx0_vfl,
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[SM6115_VDD_LPI_CX] = &lpi_cx_rwlc0_lvl,
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[SM6115_VDD_LPI_MX] = &lpi_mx_rwlm0_lvl,
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};
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static const struct rpmpd_desc sm6115_desc = {
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@ -717,12 +717,12 @@ static const struct rpmpd_desc sm6115_desc = {
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/* sm6125 RPM Power domains */
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static struct rpmpd *sm6125_rpmpds[] = {
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[SM6125_VDDCX] = &cx_rwcx0_lvl,
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[SM6125_VDDCX_AO] = &cx_rwcx0_lvl_ao,
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[SM6125_VDDCX_VFL] = &cx_rwcx0_vfl,
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[SM6125_VDDMX] = &mx_rwmx0_lvl,
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[SM6125_VDDMX_AO] = &mx_rwmx0_lvl_ao,
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[SM6125_VDDMX_VFL] = &mx_rwmx0_vfl,
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[SM6125_VDDCX] = &cx_rwcx0_lvl,
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[SM6125_VDDCX_AO] = &cx_rwcx0_lvl_ao,
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[SM6125_VDDCX_VFL] = &cx_rwcx0_vfl,
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[SM6125_VDDMX] = &mx_rwmx0_lvl,
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[SM6125_VDDMX_AO] = &mx_rwmx0_lvl_ao,
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[SM6125_VDDMX_VFL] = &mx_rwmx0_vfl,
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};
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static const struct rpmpd_desc sm6125_desc = {
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@ -732,16 +732,16 @@ static const struct rpmpd_desc sm6125_desc = {
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};
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static struct rpmpd *sm6375_rpmpds[] = {
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[SM6375_VDDCX] = &cx_rwcx0_lvl,
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[SM6375_VDDCX_AO] = &cx_rwcx0_lvl_ao,
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[SM6375_VDDCX_VFL] = &cx_rwcx0_vfl,
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[SM6375_VDDMX] = &mx_rwmx0_lvl,
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[SM6375_VDDMX_AO] = &mx_rwmx0_lvl_ao,
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[SM6375_VDDMX_VFL] = &mx_rwmx0_vfl,
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[SM6375_VDDGX] = &gx_rwgx0_lvl,
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[SM6375_VDDGX_AO] = &gx_rwgx0_lvl_ao,
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[SM6375_VDD_LPI_CX] = &lpi_cx_rwlc0_lvl,
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[SM6375_VDD_LPI_MX] = &lpi_mx_rwlm0_lvl,
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[SM6375_VDDCX] = &cx_rwcx0_lvl,
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[SM6375_VDDCX_AO] = &cx_rwcx0_lvl_ao,
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[SM6375_VDDCX_VFL] = &cx_rwcx0_vfl,
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[SM6375_VDDMX] = &mx_rwmx0_lvl,
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[SM6375_VDDMX_AO] = &mx_rwmx0_lvl_ao,
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[SM6375_VDDMX_VFL] = &mx_rwmx0_vfl,
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[SM6375_VDDGX] = &gx_rwgx0_lvl,
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[SM6375_VDDGX_AO] = &gx_rwgx0_lvl_ao,
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[SM6375_VDD_LPI_CX] = &lpi_cx_rwlc0_lvl,
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[SM6375_VDD_LPI_MX] = &lpi_mx_rwlm0_lvl,
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};
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static const struct rpmpd_desc sm6375_desc = {
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@ -751,14 +751,14 @@ static const struct rpmpd_desc sm6375_desc = {
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};
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static struct rpmpd *qcm2290_rpmpds[] = {
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[QCM2290_VDDCX] = &cx_rwcx0_lvl,
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[QCM2290_VDDCX_AO] = &cx_rwcx0_lvl_ao,
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[QCM2290_VDDCX_VFL] = &cx_rwcx0_vfl,
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[QCM2290_VDDMX] = &mx_rwmx0_lvl,
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[QCM2290_VDDMX_AO] = &mx_rwmx0_lvl_ao,
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[QCM2290_VDDMX_VFL] = &mx_rwmx0_vfl,
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[QCM2290_VDD_LPI_CX] = &lpi_cx_rwlc0_lvl,
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[QCM2290_VDD_LPI_MX] = &lpi_mx_rwlm0_lvl,
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[QCM2290_VDDCX] = &cx_rwcx0_lvl,
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[QCM2290_VDDCX_AO] = &cx_rwcx0_lvl_ao,
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[QCM2290_VDDCX_VFL] = &cx_rwcx0_vfl,
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[QCM2290_VDDMX] = &mx_rwmx0_lvl,
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[QCM2290_VDDMX_AO] = &mx_rwmx0_lvl_ao,
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[QCM2290_VDDMX_VFL] = &mx_rwmx0_vfl,
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[QCM2290_VDD_LPI_CX] = &lpi_cx_rwlc0_lvl,
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[QCM2290_VDD_LPI_MX] = &lpi_mx_rwlm0_lvl,
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};
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static const struct rpmpd_desc qcm2290_desc = {
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