Qualcomm DTS fixe for 5.19

The pinctrl state was lost in the recent refactoring of the MSM8974
 Devicetree, this contains a fix for this.
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Merge tag 'qcom-dts-fixes-for-5.19' of git://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux into arm/fixes

Qualcomm DTS fixe for 5.19

The pinctrl state was lost in the recent refactoring of the MSM8974
Devicetree, this contains a fix for this.

* tag 'qcom-dts-fixes-for-5.19' of git://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux:
  ARM: dts: qcom: msm8974: re-add missing pinctrl

Link: https://lore.kernel.org/r/20220713030627.1371156-1-bjorn.andersson@linaro.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
This commit is contained in:
Arnd Bergmann 2022-07-13 09:37:20 +02:00
commit d332a1f6b4
1 changed files with 26 additions and 4 deletions

View File

@ -506,6 +506,8 @@
interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&gcc GCC_BLSP1_UART2_APPS_CLK>, <&gcc GCC_BLSP1_AHB_CLK>; clocks = <&gcc GCC_BLSP1_UART2_APPS_CLK>, <&gcc GCC_BLSP1_AHB_CLK>;
clock-names = "core", "iface"; clock-names = "core", "iface";
pinctrl-names = "default";
pinctrl-0 = <&blsp1_uart2_default>;
status = "disabled"; status = "disabled";
}; };
@ -581,6 +583,9 @@
interrupts = <GIC_SPI 113 IRQ_TYPE_NONE>; interrupts = <GIC_SPI 113 IRQ_TYPE_NONE>;
clocks = <&gcc GCC_BLSP2_UART1_APPS_CLK>, <&gcc GCC_BLSP2_AHB_CLK>; clocks = <&gcc GCC_BLSP2_UART1_APPS_CLK>, <&gcc GCC_BLSP2_AHB_CLK>;
clock-names = "core", "iface"; clock-names = "core", "iface";
pinctrl-names = "default", "sleep";
pinctrl-0 = <&blsp2_uart1_default>;
pinctrl-1 = <&blsp2_uart1_sleep>;
status = "disabled"; status = "disabled";
}; };
@ -599,6 +604,8 @@
interrupts = <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&gcc GCC_BLSP2_UART4_APPS_CLK>, <&gcc GCC_BLSP2_AHB_CLK>; clocks = <&gcc GCC_BLSP2_UART4_APPS_CLK>, <&gcc GCC_BLSP2_AHB_CLK>;
clock-names = "core", "iface"; clock-names = "core", "iface";
pinctrl-names = "default";
pinctrl-0 = <&blsp2_uart4_default>;
status = "disabled"; status = "disabled";
}; };
@ -639,6 +646,9 @@
interrupts = <0 106 IRQ_TYPE_LEVEL_HIGH>; interrupts = <0 106 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&gcc GCC_BLSP2_QUP6_I2C_APPS_CLK>, <&gcc GCC_BLSP2_AHB_CLK>; clocks = <&gcc GCC_BLSP2_QUP6_I2C_APPS_CLK>, <&gcc GCC_BLSP2_AHB_CLK>;
clock-names = "core", "iface"; clock-names = "core", "iface";
pinctrl-names = "default", "sleep";
pinctrl-0 = <&blsp2_i2c6_default>;
pinctrl-1 = <&blsp2_i2c6_sleep>;
#address-cells = <1>; #address-cells = <1>;
#size-cells = <0>; #size-cells = <0>;
}; };
@ -1256,7 +1266,7 @@
}; };
}; };
blsp1_uart2_active: blsp1-uart2-active { blsp1_uart2_default: blsp1-uart2-default {
rx { rx {
pins = "gpio5"; pins = "gpio5";
function = "blsp_uart2"; function = "blsp_uart2";
@ -1272,7 +1282,7 @@
}; };
}; };
blsp2_uart1_active: blsp2-uart1-active { blsp2_uart1_default: blsp2-uart1-default {
tx-rts { tx-rts {
pins = "gpio41", "gpio44"; pins = "gpio41", "gpio44";
function = "blsp_uart7"; function = "blsp_uart7";
@ -1295,7 +1305,7 @@
bias-pull-down; bias-pull-down;
}; };
blsp2_uart4_active: blsp2-uart4-active { blsp2_uart4_default: blsp2-uart4-default {
tx-rts { tx-rts {
pins = "gpio53", "gpio56"; pins = "gpio53", "gpio56";
function = "blsp_uart10"; function = "blsp_uart10";
@ -1406,7 +1416,19 @@
bias-pull-up; bias-pull-up;
}; };
/* BLSP2_I2C6 info is missing - nobody uses it though? */ blsp2_i2c6_default: blsp2-i2c6-default {
pins = "gpio87", "gpio88";
function = "blsp_i2c12";
drive-strength = <2>;
bias-disable;
};
blsp2_i2c6_sleep: blsp2-i2c6-sleep {
pins = "gpio87", "gpio88";
function = "blsp_i2c12";
drive-strength = <2>;
bias-pull-up;
};
spi8_default: spi8_default { spi8_default: spi8_default {
mosi { mosi {