Qualcomm DTS fixe for 5.19
The pinctrl state was lost in the recent refactoring of the MSM8974 Devicetree, this contains a fix for this. -----BEGIN PGP SIGNATURE----- iQJPBAABCAA5FiEEBd4DzF816k8JZtUlCx85Pw2ZrcUFAmLONnUbHGJqb3JuLmFu ZGVyc3NvbkBsaW5hcm8ub3JnAAoJEAsfOT8Nma3Fdp4P/RFShMtWotQDcfUDgoeJ BpePe0NpR+Bp++amN5k+UHKfx48EwztLvY4xD/a5neekAKMdu65CO5WN1MIoX0Iz jR0G61zCf0Cem0lru+kO++eVR1ELc/n5lSI2VxgY0hgQvkXr2BRbOBP6W96fTTlx kH+IGZAoOiDElHX15oMt4obEcbyJLREPWGF2RZcEE37p1Hqd2Io5okclqCkhNe7e /Mf1SI359pMsQIzdtE3gny13Q62VVlpB5jak3tg++iekjOHzuldhGxJeVFbEGK6y Z5Y+H5zUM4/YC+iDZDpPWnV0ju+P+TcrxxdBofoo4ZdwC5B6oQAJv6A/QBUhF/VU FNyFib5ISTvtTZ0v4EifWm3gy4AP0+K0VuC2MVi+06K4RZslLI1ne4gkfr0c3xTu eG0jc6Ff6lWQ7KK7uxWzXVTOLk0b4FOJoQNFbNqTAoLYdcwU2rn6IwjOE11BAjbm VThW5Ouf7N5fMa3Z/gh/5yTMrHc8HFWBRw8n4HdDiZJc2SV+7RL16/3DFfnfBJXz aWJezOGsOSTRpbfnwt27Tn+fWvd/ipomBumd1sayoIhU6TrzfBRpqg7GTYaZ16Dt J9w75MEoZzoi9GqHt0q+F0bwIFaCFuNkqNweXqmg3XTdgCA86X1oLcHmkZsUBRtB 8gAmazFdd/KZdaxBcBPAciks =APeV -----END PGP SIGNATURE----- gpgsig -----BEGIN PGP SIGNATURE----- iQIzBAABCgAdFiEEo6/YBQwIrVS28WGKmmx57+YAGNkFAmLOdjAACgkQmmx57+YA GNnimQ//aKumUxDxkfgAvKhm1caZuLoFmonFPKPD0Zj4OIHGeyWtiHVQLFt+hnaO cOvp3MUpiwkyKoezTKw9/m9gd2vuPtU4tPjoomFt63JnVZ94La1u3suPEnE8OsEN Fk079hmJO9fnQo0FHjeWzpJ4RQNVhHzaeU25FF9Gus+CY4ZpiEONZtx56a/fb5us 0XfP+B3iNm/XZa+UxBqi4EpwkEteud/gp4eOz8eFGyJl6b36H7rdhEjKfZmQavYc jGH6CVUWfthZsAfAcyQ7ihjzlbUPT7r72b1E/GV0Q5JDFnXtXVRp2fEgwsiQgU5s /TUdjfDGpXERyDChMuxQhk4GqP8Vyp4cXK7je9gr1L3g1qkcbSfjWeKGL0VOg0YY QglPp2efogv0YjTalZrWRVN7eDD6/msUqnrPFfjb4xtHF0CiKqX6Wzk4EhVFFgR5 BgSIsi1lZKkEgqg0e8E7iuNQgvMbEFU6ExwtH42bBg2N9cESNlj6gAveclijAhVj DPFwWuXxQyrM+jGRBRJXIAVEBNfNCRVXcQ/9APLxyX6gJskv0wHFqb1G5HtRU+y+ P7I7dFPWfQEwimdYk9WK3vQrdyAj6Pc59nozRuBSOjLnjTwOPIGdrym5KjYNI+Ta JMzf4wANaYxN5zclIG9JYeETFJkLGV0PPxA8uwFJ4ckPXhxh370= =GNqz -----END PGP SIGNATURE----- Merge tag 'qcom-dts-fixes-for-5.19' of git://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux into arm/fixes Qualcomm DTS fixe for 5.19 The pinctrl state was lost in the recent refactoring of the MSM8974 Devicetree, this contains a fix for this. * tag 'qcom-dts-fixes-for-5.19' of git://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux: ARM: dts: qcom: msm8974: re-add missing pinctrl Link: https://lore.kernel.org/r/20220713030627.1371156-1-bjorn.andersson@linaro.org Signed-off-by: Arnd Bergmann <arnd@arndb.de>
This commit is contained in:
commit
d332a1f6b4
|
@ -506,6 +506,8 @@
|
|||
interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&gcc GCC_BLSP1_UART2_APPS_CLK>, <&gcc GCC_BLSP1_AHB_CLK>;
|
||||
clock-names = "core", "iface";
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&blsp1_uart2_default>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
|
@ -581,6 +583,9 @@
|
|||
interrupts = <GIC_SPI 113 IRQ_TYPE_NONE>;
|
||||
clocks = <&gcc GCC_BLSP2_UART1_APPS_CLK>, <&gcc GCC_BLSP2_AHB_CLK>;
|
||||
clock-names = "core", "iface";
|
||||
pinctrl-names = "default", "sleep";
|
||||
pinctrl-0 = <&blsp2_uart1_default>;
|
||||
pinctrl-1 = <&blsp2_uart1_sleep>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
|
@ -599,6 +604,8 @@
|
|||
interrupts = <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&gcc GCC_BLSP2_UART4_APPS_CLK>, <&gcc GCC_BLSP2_AHB_CLK>;
|
||||
clock-names = "core", "iface";
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&blsp2_uart4_default>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
|
@ -639,6 +646,9 @@
|
|||
interrupts = <0 106 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&gcc GCC_BLSP2_QUP6_I2C_APPS_CLK>, <&gcc GCC_BLSP2_AHB_CLK>;
|
||||
clock-names = "core", "iface";
|
||||
pinctrl-names = "default", "sleep";
|
||||
pinctrl-0 = <&blsp2_i2c6_default>;
|
||||
pinctrl-1 = <&blsp2_i2c6_sleep>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
};
|
||||
|
@ -1256,7 +1266,7 @@
|
|||
};
|
||||
};
|
||||
|
||||
blsp1_uart2_active: blsp1-uart2-active {
|
||||
blsp1_uart2_default: blsp1-uart2-default {
|
||||
rx {
|
||||
pins = "gpio5";
|
||||
function = "blsp_uart2";
|
||||
|
@ -1272,7 +1282,7 @@
|
|||
};
|
||||
};
|
||||
|
||||
blsp2_uart1_active: blsp2-uart1-active {
|
||||
blsp2_uart1_default: blsp2-uart1-default {
|
||||
tx-rts {
|
||||
pins = "gpio41", "gpio44";
|
||||
function = "blsp_uart7";
|
||||
|
@ -1295,7 +1305,7 @@
|
|||
bias-pull-down;
|
||||
};
|
||||
|
||||
blsp2_uart4_active: blsp2-uart4-active {
|
||||
blsp2_uart4_default: blsp2-uart4-default {
|
||||
tx-rts {
|
||||
pins = "gpio53", "gpio56";
|
||||
function = "blsp_uart10";
|
||||
|
@ -1406,7 +1416,19 @@
|
|||
bias-pull-up;
|
||||
};
|
||||
|
||||
/* BLSP2_I2C6 info is missing - nobody uses it though? */
|
||||
blsp2_i2c6_default: blsp2-i2c6-default {
|
||||
pins = "gpio87", "gpio88";
|
||||
function = "blsp_i2c12";
|
||||
drive-strength = <2>;
|
||||
bias-disable;
|
||||
};
|
||||
|
||||
blsp2_i2c6_sleep: blsp2-i2c6-sleep {
|
||||
pins = "gpio87", "gpio88";
|
||||
function = "blsp_i2c12";
|
||||
drive-strength = <2>;
|
||||
bias-pull-up;
|
||||
};
|
||||
|
||||
spi8_default: spi8_default {
|
||||
mosi {
|
||||
|
|
Loading…
Reference in New Issue