pinctrl: sh-pfc: Fix PINMUX_IPSR_PHYS() to set GPSR
This patch allows PINMUX_IPSR_PHYS() to set bits in GPSR.
When assigning function to pin, GPSR should be set to peripheral
function.
For example when using SCL3, GPSR2 bit7 (PWM1_A pin) should be set to
peripheral function.
Signed-off-by: Keiya Nobuta <nobuta.keiya@fujitsu.com>
Link: https://lore.kernel.org/r/20191008060112.29819-1-nobuta.keiya@fujitsu.com
Fixes: 50d1ba1764
("pinctrl: sh-pfc: Add physical pin multiplexing helper macros")
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
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@ -423,12 +423,12 @@ extern const struct sh_pfc_soc_info shx3_pinmux_info;
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/*
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* Describe a pinmux configuration in which a pin is physically multiplexed
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* with other pins.
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* - ipsr: IPSR field (unused, for documentation purposes only)
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* - ipsr: IPSR field
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* - fn: Function name
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* - psel: Physical multiplexing selector
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*/
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#define PINMUX_IPSR_PHYS(ipsr, fn, psel) \
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PINMUX_DATA(fn##_MARK, FN_##psel)
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PINMUX_DATA(fn##_MARK, FN_##psel, FN_##ipsr)
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/*
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* Describe a pinmux configuration for a single-function pin with GPIO
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