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drm/nouveau/core/memory: distinguish between coherent/non-coherent targets 

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
This commit is contained in:
Ben Skeggs 2016-05-10 12:42:26 +10:00
parent 134fdc1a70
commit d2ee360564
5 changed files with 27 additions and 13 deletions
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7
drivers/gpu/drm/nouveau/include/nvkm/core/memory.h
View File

@ -6,9 +6,10 @@ struct nvkm_vma;
struct nvkm_vm; struct nvkm_vm;
enum nvkm_memory_target { enum nvkm_memory_target {
NVKM_MEM_TARGET_INST, NVKM_MEM_TARGET_INST, /* instance memory */
NVKM_MEM_TARGET_VRAM, NVKM_MEM_TARGET_VRAM, /* video memory */
NVKM_MEM_TARGET_HOST, NVKM_MEM_TARGET_HOST, /* coherent system memory */
NVKM_MEM_TARGET_NCOH, /* non-coherent system memory */
}; };
struct nvkm_memory { struct nvkm_memory {

9
drivers/gpu/drm/nouveau/nvkm/engine/fifo/gf100.c
View File

@ -68,7 +68,14 @@ gf100_fifo_runlist_commit(struct gf100_fifo *fifo)
} }
nvkm_done(cur); nvkm_done(cur);
target = (nvkm_memory_target(cur) == NVKM_MEM_TARGET_HOST) ? 0x3 : 0x0; switch (nvkm_memory_target(cur)) {
case NVKM_MEM_TARGET_VRAM: target = 0; break;
case NVKM_MEM_TARGET_NCOH: target = 3; break;
default:
mutex_unlock(&subdev->mutex);
WARN_ON(1);
return;
}
nvkm_wr32(device, 0x002270, (nvkm_memory_addr(cur) >> 12) | nvkm_wr32(device, 0x002270, (nvkm_memory_addr(cur) >> 12) |
(target << 28)); (target << 28));

11
drivers/gpu/drm/nouveau/nvkm/engine/fifo/gk104.c
View File

@ -83,10 +83,13 @@ gk104_fifo_runlist_commit(struct gk104_fifo *fifo, int runl)
} }
nvkm_done(mem); nvkm_done(mem);
if (nvkm_memory_target(mem) == NVKM_MEM_TARGET_VRAM) switch (nvkm_memory_target(mem)) {
target = 0; case NVKM_MEM_TARGET_VRAM: target = 0; break;
else case NVKM_MEM_TARGET_NCOH: target = 3; break;
target = 3; default:
WARN_ON(1);
return;
}
nvkm_wr32(device, 0x002270, (nvkm_memory_addr(mem) >> 12) | nvkm_wr32(device, 0x002270, (nvkm_memory_addr(mem) >> 12) |
(target << 28)); (target << 28));

11
drivers/gpu/drm/nouveau/nvkm/falcon/v1.c
View File

@ -136,10 +136,13 @@ nvkm_falcon_v1_bind_context(struct nvkm_falcon *falcon, struct nvkm_gpuobj *ctx)
nvkm_falcon_wr32(falcon, 0xe00 + 4 * FALCON_DMAIDX_PHYS_SYS_NCOH, 0x6); nvkm_falcon_wr32(falcon, 0xe00 + 4 * FALCON_DMAIDX_PHYS_SYS_NCOH, 0x6);
/* Set context */ /* Set context */
if (nvkm_memory_target(ctx->memory) == NVKM_MEM_TARGET_VRAM) switch (nvkm_memory_target(ctx->memory)) {
inst_loc = 0x0; /* FB */ case NVKM_MEM_TARGET_VRAM: inst_loc = 0; break;
else case NVKM_MEM_TARGET_NCOH: inst_loc = 3; break;
inst_loc = 0x3; /* Non-coherent sysmem */ default:
WARN_ON(1);
return;
}
/* Enable context */ /* Enable context */
nvkm_falcon_mask(falcon, 0x048, 0x1, 0x1); nvkm_falcon_mask(falcon, 0x048, 0x1, 0x1);

2
drivers/gpu/drm/nouveau/nvkm/subdev/instmem/gk20a.c
View File

@ -116,7 +116,7 @@ struct gk20a_instmem {
static enum nvkm_memory_target static enum nvkm_memory_target
gk20a_instobj_target(struct nvkm_memory *memory) gk20a_instobj_target(struct nvkm_memory *memory)
{ {
return NVKM_MEM_TARGET_HOST; return NVKM_MEM_TARGET_NCOH;
} }
static u64 static u64