powerpc/64: Optimise set/clear of CTRL[RUN] (runlatch)
On modern CPUs the CTRL register is read-only except bit 63 which is the run latch control. This means it can be updated with a mtspr rather than mfspr/mtspr. To accomodate older CPUs (Cell at least), where there are other bits in the register, we still do a read/modify/write on pre 2.06 CPUs. Signed-off-by: Nicholas Piggin <npiggin@gmail.com> [mpe: Update change log to mention 2.06 workaround] Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
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@ -1979,11 +1979,25 @@ void show_stack(struct task_struct *tsk, unsigned long *stack)
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void notrace __ppc64_runlatch_on(void)
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void notrace __ppc64_runlatch_on(void)
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{
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{
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struct thread_info *ti = current_thread_info();
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struct thread_info *ti = current_thread_info();
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unsigned long ctrl;
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ctrl = mfspr(SPRN_CTRLF);
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if (cpu_has_feature(CPU_FTR_ARCH_206)) {
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ctrl |= CTRL_RUNLATCH;
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/*
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mtspr(SPRN_CTRLT, ctrl);
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* Least significant bit (RUN) is the only writable bit of
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* the CTRL register, so we can avoid mfspr. 2.06 is not the
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* earliest ISA where this is the case, but it's convenient.
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*/
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mtspr(SPRN_CTRLT, CTRL_RUNLATCH);
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} else {
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unsigned long ctrl;
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/*
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* Some architectures (e.g., Cell) have writable fields other
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* than RUN, so do the read-modify-write.
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*/
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ctrl = mfspr(SPRN_CTRLF);
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ctrl |= CTRL_RUNLATCH;
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mtspr(SPRN_CTRLT, ctrl);
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}
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ti->local_flags |= _TLF_RUNLATCH;
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ti->local_flags |= _TLF_RUNLATCH;
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}
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}
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@ -1992,13 +2006,18 @@ void notrace __ppc64_runlatch_on(void)
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void notrace __ppc64_runlatch_off(void)
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void notrace __ppc64_runlatch_off(void)
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{
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{
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struct thread_info *ti = current_thread_info();
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struct thread_info *ti = current_thread_info();
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unsigned long ctrl;
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ti->local_flags &= ~_TLF_RUNLATCH;
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ti->local_flags &= ~_TLF_RUNLATCH;
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ctrl = mfspr(SPRN_CTRLF);
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if (cpu_has_feature(CPU_FTR_ARCH_206)) {
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ctrl &= ~CTRL_RUNLATCH;
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mtspr(SPRN_CTRLT, 0);
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mtspr(SPRN_CTRLT, ctrl);
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} else {
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unsigned long ctrl;
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ctrl = mfspr(SPRN_CTRLF);
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ctrl &= ~CTRL_RUNLATCH;
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mtspr(SPRN_CTRLT, ctrl);
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}
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}
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}
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#endif /* CONFIG_PPC64 */
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#endif /* CONFIG_PPC64 */
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