powerpc/64s/exception: INT_COMMON add DAR, DSISR, reconcile options
Move DAR and DSISR saving to pt_regs into INT_COMMON. Also add an option to expand RECONCILE_IRQ_STATE. Signed-off-by: Nicholas Piggin <npiggin@gmail.com> Signed-off-by: Michael Ellerman <mpe@ellerman.id.au> Link: https://lore.kernel.org/r/20190802105709.27696-33-npiggin@gmail.com
This commit is contained in:
Nicholas Piggin
Michael Ellerman
parent
8c9fb5d4f3
commit
d1a8471888
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@ -398,7 +398,7 @@ END_FTR_SECTION_NESTED(CPU_FTR_HAS_PPR,CPU_FTR_HAS_PPR,948)
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* If stack=0, then the stack is already set in r1, and r1 is saved in r10.
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* PPR save and CPU accounting is not done for the !stack case (XXX why not?)
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*/
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.macro INT_COMMON vec, area, stack, kaup
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.macro INT_COMMON vec, area, stack, kaup, reconcile, dar, dsisr
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.if \stack
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andi. r10,r12,MSR_PR /* See if coming from user */
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mr r10,r1 /* Save r1 */
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@ -442,6 +442,24 @@ END_FTR_SECTION_NESTED(CPU_FTR_HAS_PPR,CPU_FTR_HAS_PPR,948)
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std r9,GPR11(r1)
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std r10,GPR12(r1)
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std r11,GPR13(r1)
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.if \dar
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.if \dar == 2
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ld r10,_NIP(r1)
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.else
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ld r10,\area+EX_DAR(r13)
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.endif
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std r10,_DAR(r1)
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.endif
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.if \dsisr
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.if \dsisr == 2
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ld r10,_MSR(r1)
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lis r11,DSISR_SRR1_MATCH_64S@h
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and r10,r10,r11
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.else
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lwz r10,\area+EX_DSISR(r13)
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.endif
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std r10,_DSISR(r1)
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.endif
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BEGIN_FTR_SECTION_NESTED(66)
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ld r10,\area+EX_CFAR(r13)
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std r10,ORIG_GPR3(r1)
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@ -468,6 +486,10 @@ END_FTR_SECTION_NESTED(CPU_FTR_CFAR, CPU_FTR_CFAR, 66)
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.if \stack
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ACCOUNT_STOLEN_TIME
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.endif
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.if \reconcile
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RECONCILE_IRQ_STATE(r10, r11)
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.endif
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.endm
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/*
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@ -665,9 +687,8 @@ END_FTR_SECTION_IFSET(CPU_FTR_CAN_NAP)
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#define EXC_COMMON(name, realvec, hdlr) \
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EXC_COMMON_BEGIN(name); \
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INT_COMMON realvec, PACA_EXGEN, 1, 1 ; \
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INT_COMMON realvec, PACA_EXGEN, 1, 1, 1, 0, 0 ; \
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bl save_nvgprs; \
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RECONCILE_IRQ_STATE(r10, r11); \
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addi r3,r1,STACK_FRAME_OVERHEAD; \
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bl hdlr; \
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b ret_from_except
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@ -678,9 +699,8 @@ END_FTR_SECTION_IFSET(CPU_FTR_CAN_NAP)
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*/
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#define EXC_COMMON_ASYNC(name, realvec, hdlr) \
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EXC_COMMON_BEGIN(name); \
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INT_COMMON realvec, PACA_EXGEN, 1, 1 ; \
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INT_COMMON realvec, PACA_EXGEN, 1, 1, 1, 0, 0 ; \
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FINISH_NAP; \
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RECONCILE_IRQ_STATE(r10, r11); \
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RUNLATCH_ON; \
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addi r3,r1,STACK_FRAME_OVERHEAD; \
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bl hdlr; \
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@ -859,7 +879,7 @@ EXC_COMMON_BEGIN(system_reset_common)
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mr r10,r1
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ld r1,PACA_NMI_EMERG_SP(r13)
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subi r1,r1,INT_FRAME_SIZE
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INT_COMMON 0x100, PACA_EXNMI, 0, 1
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INT_COMMON 0x100, PACA_EXNMI, 0, 1, 0, 0, 0
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bl save_nvgprs
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/*
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* Set IRQS_ALL_DISABLED unconditionally so arch_irqs_disabled does
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@ -970,12 +990,7 @@ EXC_COMMON_BEGIN(machine_check_early_common)
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subi r1,r1,INT_FRAME_SIZE /* alloc stack frame */
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/* We don't touch AMR here, we never go to virtual mode */
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INT_COMMON 0x200, PACA_EXMC, 0, 0
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ld r3,PACA_EXMC+EX_DAR(r13)
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lwz r4,PACA_EXMC+EX_DSISR(r13)
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std r3,_DAR(r1)
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std r4,_DSISR(r1)
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INT_COMMON 0x200, PACA_EXMC, 0, 0, 0, 1, 1
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BEGIN_FTR_SECTION
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bl enable_machine_check
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@ -1070,16 +1085,11 @@ EXC_COMMON_BEGIN(machine_check_common)
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* Machine check is different because we use a different
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* save area: PACA_EXMC instead of PACA_EXGEN.
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*/
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INT_COMMON 0x200, PACA_EXMC, 1, 1
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INT_COMMON 0x200, PACA_EXMC, 1, 1, 1, 1, 1
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FINISH_NAP
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RECONCILE_IRQ_STATE(r10, r11)
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ld r3,PACA_EXMC+EX_DAR(r13)
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lwz r4,PACA_EXMC+EX_DSISR(r13)
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/* Enable MSR_RI when finished with PACA_EXMC */
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li r10,MSR_RI
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mtmsrd r10,1
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std r3,_DAR(r1)
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std r4,_DSISR(r1)
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bl save_nvgprs
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addi r3,r1,STACK_FRAME_OVERHEAD
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bl machine_check_exception
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@ -1162,14 +1172,11 @@ EXC_COMMON_BEGIN(data_access_common)
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* r9 - r13 are saved in paca->exgen.
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* EX_DAR and EX_DSISR have saved DAR/DSISR
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*/
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INT_COMMON 0x300, PACA_EXGEN, 1, 1
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RECONCILE_IRQ_STATE(r10, r11)
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INT_COMMON 0x300, PACA_EXGEN, 1, 1, 1, 1, 1
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ld r12,_MSR(r1)
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ld r3,PACA_EXGEN+EX_DAR(r13)
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lwz r4,PACA_EXGEN+EX_DSISR(r13)
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ld r3,_DAR(r1)
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ld r4,_DSISR(r1)
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li r5,0x300
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std r3,_DAR(r1)
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std r4,_DSISR(r1)
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BEGIN_MMU_FTR_SECTION
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b do_hash_page /* Try to handle as hpte fault */
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MMU_FTR_SECTION_ELSE
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@ -1185,9 +1192,8 @@ EXC_VIRT_BEGIN(data_access_slb, 0x4380, 0x80)
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EXC_VIRT_END(data_access_slb, 0x4380, 0x80)
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INT_KVM_HANDLER 0x380, EXC_STD, PACA_EXSLB, 1
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EXC_COMMON_BEGIN(data_access_slb_common)
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INT_COMMON 0x380, PACA_EXSLB, 1, 1
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ld r4,PACA_EXSLB+EX_DAR(r13)
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std r4,_DAR(r1)
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INT_COMMON 0x380, PACA_EXSLB, 1, 1, 0, 1, 0
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ld r4,_DAR(r1)
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addi r3,r1,STACK_FRAME_OVERHEAD
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BEGIN_MMU_FTR_SECTION
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/* HPT case, do SLB fault */
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@ -1218,14 +1224,11 @@ EXC_VIRT_BEGIN(instruction_access, 0x4400, 0x80)
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EXC_VIRT_END(instruction_access, 0x4400, 0x80)
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INT_KVM_HANDLER 0x400, EXC_STD, PACA_EXGEN, 0
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EXC_COMMON_BEGIN(instruction_access_common)
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INT_COMMON 0x400, PACA_EXGEN, 1, 1
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RECONCILE_IRQ_STATE(r10, r11)
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ld r12,_MSR(r1)
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ld r3,_NIP(r1)
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andis. r4,r12,DSISR_SRR1_MATCH_64S@h
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INT_COMMON 0x400, PACA_EXGEN, 1, 1, 1, 2, 2
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ld r12,_MSR(r1)
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ld r3,_DAR(r1)
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ld r4,_DSISR(r1)
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li r5,0x400
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std r3,_DAR(r1)
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std r4,_DSISR(r1)
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BEGIN_MMU_FTR_SECTION
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b do_hash_page /* Try to handle as hpte fault */
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MMU_FTR_SECTION_ELSE
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@ -1241,8 +1244,8 @@ EXC_VIRT_BEGIN(instruction_access_slb, 0x4480, 0x80)
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EXC_VIRT_END(instruction_access_slb, 0x4480, 0x80)
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INT_KVM_HANDLER 0x480, EXC_STD, PACA_EXSLB, 0
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EXC_COMMON_BEGIN(instruction_access_slb_common)
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INT_COMMON 0x480, PACA_EXSLB, 1, 1
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ld r4,_NIP(r1)
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INT_COMMON 0x480, PACA_EXSLB, 1, 1, 0, 2, 0
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ld r4,_DAR(r1)
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addi r3,r1,STACK_FRAME_OVERHEAD
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BEGIN_MMU_FTR_SECTION
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/* HPT case, do SLB fault */
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@ -1258,7 +1261,7 @@ ALT_MMU_FTR_SECTION_END_IFCLR(MMU_FTR_TYPE_RADIX)
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std r3,RESULT(r1)
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bl save_nvgprs
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RECONCILE_IRQ_STATE(r10, r11)
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ld r4,_NIP(r1)
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ld r4,_DAR(r1)
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ld r5,RESULT(r1)
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addi r3,r1,STACK_FRAME_OVERHEAD
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bl do_bad_slb_fault
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@ -1283,13 +1286,8 @@ EXC_VIRT_BEGIN(alignment, 0x4600, 0x100)
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EXC_VIRT_END(alignment, 0x4600, 0x100)
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INT_KVM_HANDLER 0x600, EXC_STD, PACA_EXGEN, 0
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EXC_COMMON_BEGIN(alignment_common)
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INT_COMMON 0x600, PACA_EXGEN, 1, 1
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ld r3,PACA_EXGEN+EX_DAR(r13)
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lwz r4,PACA_EXGEN+EX_DSISR(r13)
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std r3,_DAR(r1)
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std r4,_DSISR(r1)
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INT_COMMON 0x600, PACA_EXGEN, 1, 1, 1, 1, 1
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bl save_nvgprs
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RECONCILE_IRQ_STATE(r10, r11)
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addi r3,r1,STACK_FRAME_OVERHEAD
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bl alignment_exception
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b ret_from_except
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@ -1329,9 +1327,8 @@ EXC_COMMON_BEGIN(program_check_common)
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subi r1,r1,INT_FRAME_SIZE /* alloc stack frame */
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b 3f /* Jump into the macro !! */
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2:
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INT_COMMON 0x700, PACA_EXGEN, 1, 1
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INT_COMMON 0x700, PACA_EXGEN, 1, 1, 1, 0, 0
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bl save_nvgprs
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RECONCILE_IRQ_STATE(r10, r11)
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addi r3,r1,STACK_FRAME_OVERHEAD
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bl program_check_exception
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b ret_from_except
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@ -1345,7 +1342,7 @@ EXC_VIRT_BEGIN(fp_unavailable, 0x4800, 0x100)
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EXC_VIRT_END(fp_unavailable, 0x4800, 0x100)
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INT_KVM_HANDLER 0x800, EXC_STD, PACA_EXGEN, 0
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EXC_COMMON_BEGIN(fp_unavailable_common)
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INT_COMMON 0x800, PACA_EXGEN, 1, 1
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INT_COMMON 0x800, PACA_EXGEN, 1, 1, 0, 0, 0
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bne 1f /* if from user, just load it up */
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bl save_nvgprs
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RECONCILE_IRQ_STATE(r10, r11)
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@ -1561,15 +1558,11 @@ EXC_VIRT_BEGIN(h_data_storage, 0x4e00, 0x20)
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EXC_VIRT_END(h_data_storage, 0x4e00, 0x20)
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INT_KVM_HANDLER 0xe00, EXC_HV, PACA_EXGEN, 1
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EXC_COMMON_BEGIN(h_data_storage_common)
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INT_COMMON 0xe00, PACA_EXGEN, 1, 1
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INT_COMMON 0xe00, PACA_EXGEN, 1, 1, 1, 1, 1
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bl save_nvgprs
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RECONCILE_IRQ_STATE(r10, r11)
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addi r3,r1,STACK_FRAME_OVERHEAD
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BEGIN_MMU_FTR_SECTION
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ld r4,PACA_EXGEN+EX_DAR(r13)
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lwz r5,PACA_EXGEN+EX_DSISR(r13)
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std r4,_DAR(r1)
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std r5,_DSISR(r1)
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ld r4,_DAR(r1)
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li r5,SIGSEGV
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bl bad_page_fault
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MMU_FTR_SECTION_ELSE
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@ -1617,7 +1610,7 @@ EXC_COMMON_BEGIN(hmi_exception_early_common)
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subi r1,r1,INT_FRAME_SIZE /* alloc stack frame */
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/* We don't touch AMR here, we never go to virtual mode */
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INT_COMMON 0xe60, PACA_EXGEN, 0, 0
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INT_COMMON 0xe60, PACA_EXGEN, 0, 0, 0, 0, 0
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addi r3,r1,STACK_FRAME_OVERHEAD
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bl hmi_exception_realmode
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@ -1636,11 +1629,10 @@ EXC_COMMON_BEGIN(hmi_exception_early_common)
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INT_HANDLER hmi_exception, 0xe60, hsrr=EXC_HV, bitmask=IRQS_DISABLED, kvm=1
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EXC_COMMON_BEGIN(hmi_exception_common)
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INT_COMMON 0xe60, PACA_EXGEN, 1, 1
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INT_COMMON 0xe60, PACA_EXGEN, 1, 1, 1, 0, 0
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FINISH_NAP
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bl save_nvgprs
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RECONCILE_IRQ_STATE(r10, r11)
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RUNLATCH_ON
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bl save_nvgprs
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addi r3,r1,STACK_FRAME_OVERHEAD
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bl handle_hmi_exception
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b ret_from_except
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@ -1694,7 +1686,7 @@ EXC_VIRT_BEGIN(altivec_unavailable, 0x4f20, 0x20)
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EXC_VIRT_END(altivec_unavailable, 0x4f20, 0x20)
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INT_KVM_HANDLER 0xf20, EXC_STD, PACA_EXGEN, 0
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EXC_COMMON_BEGIN(altivec_unavailable_common)
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INT_COMMON 0xf20, PACA_EXGEN, 1, 1
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INT_COMMON 0xf20, PACA_EXGEN, 1, 1, 0, 0, 0
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#ifdef CONFIG_ALTIVEC
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BEGIN_FTR_SECTION
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beq 1f
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@ -1735,7 +1727,7 @@ EXC_VIRT_BEGIN(vsx_unavailable, 0x4f40, 0x20)
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EXC_VIRT_END(vsx_unavailable, 0x4f40, 0x20)
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INT_KVM_HANDLER 0xf40, EXC_STD, PACA_EXGEN, 0
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EXC_COMMON_BEGIN(vsx_unavailable_common)
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INT_COMMON 0xf40, PACA_EXGEN, 1, 1
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INT_COMMON 0xf40, PACA_EXGEN, 1, 1, 0, 0, 0
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#ifdef CONFIG_VSX
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BEGIN_FTR_SECTION
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beq 1f
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@ -1986,9 +1978,8 @@ EXC_COMMON_BEGIN(soft_nmi_common)
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mr r10,r1
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ld r1,PACAEMERGSP(r13)
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subi r1,r1,INT_FRAME_SIZE
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INT_COMMON 0x900, PACA_EXGEN, 0, 1
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INT_COMMON 0x900, PACA_EXGEN, 0, 1, 1, 0, 0
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bl save_nvgprs
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RECONCILE_IRQ_STATE(r10, r11)
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addi r3,r1,STACK_FRAME_OVERHEAD
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bl soft_nmi_interrupt
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b ret_from_except
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