gpio: sifive: Support IRQ wake
Each pin drives a separate interrupt in the parent IRQ domain, so there is no need to set IRQCHIP_MASK_ON_SUSPEND. Signed-off-by: Samuel Holland <samuel.holland@sifive.com> Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org>
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@ -150,6 +150,7 @@ static const struct irq_chip sifive_gpio_irqchip = {
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.irq_disable = sifive_gpio_irq_disable,
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.irq_eoi = sifive_gpio_irq_eoi,
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.irq_set_affinity = sifive_gpio_irq_set_affinity,
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.irq_set_wake = irq_chip_set_wake_parent,
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.flags = IRQCHIP_IMMUTABLE,
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GPIOCHIP_IRQ_RESOURCE_HELPERS,
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};
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