Revert "drm/scheduler: improve job distribution with multiple queues"
It needs to revert this patch to avoid amdgpu_test compute hang problem
on picasso.
This reverts commit 56822db194
.
Signed-off-by: changzhu <Changfeng.Zhu@amd.com>
Reviewed-by: Feifei Xu <Feifei.Xu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
This commit is contained in:
parent
9015d60c9e
commit
d164bebb95
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@ -148,7 +148,7 @@ static struct drm_sched_rq *
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drm_sched_entity_get_free_sched(struct drm_sched_entity *entity)
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{
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struct drm_sched_rq *rq = NULL;
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unsigned int min_score = UINT_MAX, num_score;
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unsigned int min_jobs = UINT_MAX, num_jobs;
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int i;
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for (i = 0; i < entity->num_sched_list; ++i) {
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@ -159,9 +159,9 @@ drm_sched_entity_get_free_sched(struct drm_sched_entity *entity)
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continue;
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}
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num_score = atomic_read(&sched->score);
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if (num_score < min_score) {
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min_score = num_score;
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num_jobs = atomic_read(&sched->num_jobs);
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if (num_jobs < min_jobs) {
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min_jobs = num_jobs;
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rq = &entity->sched_list[i]->sched_rq[entity->priority];
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}
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}
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@ -516,7 +516,7 @@ void drm_sched_entity_push_job(struct drm_sched_job *sched_job,
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bool first;
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trace_drm_sched_job(sched_job, entity);
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atomic_inc(&entity->rq->sched->score);
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atomic_inc(&entity->rq->sched->num_jobs);
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WRITE_ONCE(entity->last_user, current->group_leader);
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first = spsc_queue_push(&entity->job_queue, &sched_job->queue_node);
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@ -92,7 +92,6 @@ void drm_sched_rq_add_entity(struct drm_sched_rq *rq,
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if (!list_empty(&entity->list))
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return;
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spin_lock(&rq->lock);
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atomic_inc(&rq->sched->score);
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list_add_tail(&entity->list, &rq->entities);
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spin_unlock(&rq->lock);
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}
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@ -111,7 +110,6 @@ void drm_sched_rq_remove_entity(struct drm_sched_rq *rq,
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if (list_empty(&entity->list))
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return;
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spin_lock(&rq->lock);
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atomic_dec(&rq->sched->score);
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list_del_init(&entity->list);
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if (rq->current_entity == entity)
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rq->current_entity = NULL;
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@ -649,7 +647,7 @@ static void drm_sched_process_job(struct dma_fence *f, struct dma_fence_cb *cb)
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struct drm_gpu_scheduler *sched = s_fence->sched;
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atomic_dec(&sched->hw_rq_count);
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atomic_dec(&sched->score);
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atomic_dec(&sched->num_jobs);
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trace_drm_sched_process_job(s_fence);
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@ -824,7 +822,7 @@ int drm_sched_init(struct drm_gpu_scheduler *sched,
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spin_lock_init(&sched->job_list_lock);
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atomic_set(&sched->hw_rq_count, 0);
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INIT_DELAYED_WORK(&sched->work_tdr, drm_sched_job_timedout);
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atomic_set(&sched->score, 0);
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atomic_set(&sched->num_jobs, 0);
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atomic64_set(&sched->job_id_count, 0);
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/* Each scheduler will run on a seperate kernel thread */
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@ -262,7 +262,7 @@ struct drm_sched_backend_ops {
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* @job_list_lock: lock to protect the ring_mirror_list.
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* @hang_limit: once the hangs by a job crosses this limit then it is marked
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* guilty and it will be considered for scheduling further.
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* @score: score to help loadbalancer pick a idle sched
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* @num_jobs: the number of jobs in queue in the scheduler
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* @ready: marks if the underlying HW is ready to work
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* @free_guilty: A hit to time out handler to free the guilty job.
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*
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@ -283,8 +283,8 @@ struct drm_gpu_scheduler {
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struct list_head ring_mirror_list;
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spinlock_t job_list_lock;
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int hang_limit;
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atomic_t score;
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bool ready;
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atomic_t num_jobs;
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bool ready;
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bool free_guilty;
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};
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