net: marvell: mvpp2: only reprogram what is necessary on mac_config
mac_config() can be called at any point, and the expected behaviour from MAC drivers is to only reprogram when necessary - and certainly avoid taking the link down on every call. Unfortunately, mvpp2 does exactly that - it takes the link down, and reprograms everything, and then releases the forced-link down. This is bad, it can cause the link to bounce: - SFP detects signal, disables LOS indication. - SFP code calls into phylink, calling phylink_sfp_link_up() which triggers a resolve. - phylink_resolve() calls phylink_get_mac_state() and finds the MAC reporting link up. - phylink wants to configure the pause mode on the MAC, so calls phylink_mac_config() - mvpp2 takes the link down temporarily, generating a MAC link down event followed by another MAC link event. - phylink calls mac_link_up() and then processes the MAC link down event. - phylink_resolve() gets called again, registers the link down, and calls mach_link_down() before re-running itself. - phylink_resolve() starts again at step 3 above. This sequence repeats. GMAC versions prior to mvpp2 do not require the link to be taken down except when certain link properties (eg, switching between SGMII and 1000base-X mode, or enabling/disabling in-band negotiation) are changed. Implement this for mvpp2. Tested-by: Sven Auhagen <sven.auhagen@voleatech.de> Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk> Signed-off-by: David S. Miller <davem@davemloft.net>
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@ -4534,29 +4534,21 @@ static void mvpp2_xlg_config(struct mvpp2_port *port, unsigned int mode,
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static void mvpp2_gmac_config(struct mvpp2_port *port, unsigned int mode,
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const struct phylink_link_state *state)
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{
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u32 an, ctrl0, ctrl2, ctrl4;
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u32 old_ctrl2;
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u32 old_an, an;
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u32 old_ctrl0, ctrl0;
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u32 old_ctrl2, ctrl2;
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u32 old_ctrl4, ctrl4;
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an = readl(port->base + MVPP2_GMAC_AUTONEG_CONFIG);
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ctrl0 = readl(port->base + MVPP2_GMAC_CTRL_0_REG);
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ctrl2 = readl(port->base + MVPP2_GMAC_CTRL_2_REG);
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ctrl4 = readl(port->base + MVPP22_GMAC_CTRL_4_REG);
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old_ctrl2 = ctrl2;
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/* Force link down */
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an &= ~MVPP2_GMAC_FORCE_LINK_PASS;
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an |= MVPP2_GMAC_FORCE_LINK_DOWN;
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writel(an, port->base + MVPP2_GMAC_AUTONEG_CONFIG);
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/* Set the GMAC in a reset state */
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ctrl2 |= MVPP2_GMAC_PORT_RESET_MASK;
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writel(ctrl2, port->base + MVPP2_GMAC_CTRL_2_REG);
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old_an = an = readl(port->base + MVPP2_GMAC_AUTONEG_CONFIG);
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old_ctrl0 = ctrl0 = readl(port->base + MVPP2_GMAC_CTRL_0_REG);
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old_ctrl2 = ctrl2 = readl(port->base + MVPP2_GMAC_CTRL_2_REG);
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old_ctrl4 = ctrl4 = readl(port->base + MVPP22_GMAC_CTRL_4_REG);
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an &= ~(MVPP2_GMAC_CONFIG_MII_SPEED | MVPP2_GMAC_CONFIG_GMII_SPEED |
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MVPP2_GMAC_AN_SPEED_EN | MVPP2_GMAC_FC_ADV_EN |
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MVPP2_GMAC_FC_ADV_ASM_EN | MVPP2_GMAC_FLOW_CTRL_AUTONEG |
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MVPP2_GMAC_CONFIG_FULL_DUPLEX | MVPP2_GMAC_AN_DUPLEX_EN);
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MVPP2_GMAC_CONFIG_FULL_DUPLEX | MVPP2_GMAC_AN_DUPLEX_EN |
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MVPP2_GMAC_IN_BAND_AUTONEG | MVPP2_GMAC_IN_BAND_AUTONEG_BYPASS);
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ctrl0 &= ~MVPP2_GMAC_PORT_TYPE_MASK;
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ctrl2 &= ~(MVPP2_GMAC_INBAND_AN_MASK | MVPP2_GMAC_PORT_RESET_MASK |
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MVPP2_GMAC_PCS_ENABLE_MASK);
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@ -4623,7 +4615,8 @@ static void mvpp2_gmac_config(struct mvpp2_port *port, unsigned int mode,
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*/
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ctrl0 |= MVPP2_GMAC_PORT_TYPE_MASK;
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an &= ~(MVPP2_GMAC_FORCE_LINK_DOWN | MVPP2_GMAC_FORCE_LINK_PASS);
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an |= MVPP2_GMAC_CONFIG_GMII_SPEED |
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an |= MVPP2_GMAC_IN_BAND_AUTONEG |
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MVPP2_GMAC_CONFIG_GMII_SPEED |
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MVPP2_GMAC_CONFIG_FULL_DUPLEX;
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if (state->pause & MLO_PAUSE_AN && state->an_enabled) {
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@ -4636,10 +4629,29 @@ static void mvpp2_gmac_config(struct mvpp2_port *port, unsigned int mode,
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}
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}
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writel(ctrl0, port->base + MVPP2_GMAC_CTRL_0_REG);
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writel(ctrl2, port->base + MVPP2_GMAC_CTRL_2_REG);
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writel(ctrl4, port->base + MVPP22_GMAC_CTRL_4_REG);
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writel(an, port->base + MVPP2_GMAC_AUTONEG_CONFIG);
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if ((old_ctrl0 ^ ctrl0) & MVPP2_GMAC_PORT_TYPE_MASK ||
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(old_ctrl2 ^ ctrl2) & MVPP2_GMAC_INBAND_AN_MASK ||
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(old_an ^ an) & MVPP2_GMAC_IN_BAND_AUTONEG) {
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/* Force link down */
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old_an &= ~MVPP2_GMAC_FORCE_LINK_PASS;
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old_an |= MVPP2_GMAC_FORCE_LINK_DOWN;
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writel(old_an, port->base + MVPP2_GMAC_AUTONEG_CONFIG);
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/* Set the GMAC in a reset state - do this in a way that
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* ensures we clear it below.
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*/
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old_ctrl2 |= MVPP2_GMAC_PORT_RESET_MASK;
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writel(old_ctrl2, port->base + MVPP2_GMAC_CTRL_2_REG);
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}
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if (old_ctrl0 != ctrl0)
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writel(ctrl0, port->base + MVPP2_GMAC_CTRL_0_REG);
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if (old_ctrl2 != ctrl2)
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writel(ctrl2, port->base + MVPP2_GMAC_CTRL_2_REG);
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if (old_ctrl4 != ctrl4)
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writel(ctrl4, port->base + MVPP22_GMAC_CTRL_4_REG);
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if (old_an != an)
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writel(an, port->base + MVPP2_GMAC_AUTONEG_CONFIG);
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if (old_ctrl2 & MVPP2_GMAC_PORT_RESET_MASK) {
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while (readl(port->base + MVPP2_GMAC_CTRL_2_REG) &
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