b43: N-PHY: add PHY rev7+ workarounds
Signed-off-by: Rafał Miłecki <zajec5@gmail.com> Signed-off-by: John W. Linville <linville@tuxdriver.com>
This commit is contained in:
Rafał Miłecki
John W. Linville
parent
fa0f2b3860
commit
d11d354b7b
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@ -1860,12 +1860,334 @@ static void b43_nphy_gain_ctl_workarounds_rev1_2(struct b43_wldev *dev)
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/* http://bcm-v4.sipsolutions.net/802.11/PHY/N/WorkaroundsGainCtrl */
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static void b43_nphy_gain_ctl_workarounds(struct b43_wldev *dev)
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{
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if (dev->phy.rev >= 3)
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if (dev->phy.rev >= 7)
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; /* TODO */
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else if (dev->phy.rev >= 3)
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b43_nphy_gain_ctl_workarounds_rev3plus(dev);
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else
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b43_nphy_gain_ctl_workarounds_rev1_2(dev);
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}
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/* http://bcm-v4.sipsolutions.net/PHY/N/Read_Lpf_Bw_Ctl */
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static u16 b43_nphy_read_lpf_ctl(struct b43_wldev *dev, u16 offset)
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{
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if (!offset)
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offset = (dev->phy.is_40mhz) ? 0x159 : 0x154;
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return b43_ntab_read(dev, B43_NTAB16(7, offset)) & 0x7;
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}
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static void b43_nphy_workarounds_rev7plus(struct b43_wldev *dev)
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{
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struct ssb_sprom *sprom = dev->dev->bus_sprom;
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struct b43_phy *phy = &dev->phy;
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u8 rx2tx_events_ipa[9] = { 0x0, 0x1, 0x2, 0x8, 0x5, 0x6, 0xF, 0x3,
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0x1F };
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u8 rx2tx_delays_ipa[9] = { 8, 6, 6, 4, 4, 16, 43, 1, 1 };
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u16 ntab7_15e_16e[] = { 0x10f, 0x10f };
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u8 ntab7_138_146[] = { 0x11, 0x11 };
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u8 ntab7_133[] = { 0x77, 0x11, 0x11 };
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u16 lpf_20, lpf_40, lpf_11b;
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u16 bcap_val, bcap_val_11b, bcap_val_11n_20, bcap_val_11n_40;
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u16 scap_val, scap_val_11b, scap_val_11n_20, scap_val_11n_40;
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bool rccal_ovrd = false;
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u16 rx2tx_lut_20_11b, rx2tx_lut_20_11n, rx2tx_lut_40_11n;
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u16 bias, conv, filt;
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u32 tmp32;
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u8 core;
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if (phy->rev == 7) {
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b43_phy_set(dev, B43_NPHY_FINERX2_CGC, 0x10);
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b43_phy_maskset(dev, B43_NPHY_FREQGAIN0, 0xFF80, 0x0020);
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b43_phy_maskset(dev, B43_NPHY_FREQGAIN0, 0x80FF, 0x2700);
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b43_phy_maskset(dev, B43_NPHY_FREQGAIN1, 0xFF80, 0x002E);
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b43_phy_maskset(dev, B43_NPHY_FREQGAIN1, 0x80FF, 0x3300);
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b43_phy_maskset(dev, B43_NPHY_FREQGAIN2, 0xFF80, 0x0037);
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b43_phy_maskset(dev, B43_NPHY_FREQGAIN2, 0x80FF, 0x3A00);
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b43_phy_maskset(dev, B43_NPHY_FREQGAIN3, 0xFF80, 0x003C);
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b43_phy_maskset(dev, B43_NPHY_FREQGAIN3, 0x80FF, 0x3E00);
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b43_phy_maskset(dev, B43_NPHY_FREQGAIN4, 0xFF80, 0x003E);
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b43_phy_maskset(dev, B43_NPHY_FREQGAIN4, 0x80FF, 0x3F00);
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b43_phy_maskset(dev, B43_NPHY_FREQGAIN5, 0xFF80, 0x0040);
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b43_phy_maskset(dev, B43_NPHY_FREQGAIN5, 0x80FF, 0x4000);
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b43_phy_maskset(dev, B43_NPHY_FREQGAIN6, 0xFF80, 0x0040);
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b43_phy_maskset(dev, B43_NPHY_FREQGAIN6, 0x80FF, 0x4000);
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b43_phy_maskset(dev, B43_NPHY_FREQGAIN7, 0xFF80, 0x0040);
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b43_phy_maskset(dev, B43_NPHY_FREQGAIN7, 0x80FF, 0x4000);
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}
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if (phy->rev <= 8) {
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b43_phy_write(dev, 0x23F, 0x1B0);
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b43_phy_write(dev, 0x240, 0x1B0);
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}
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if (phy->rev >= 8)
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b43_phy_maskset(dev, B43_NPHY_TXTAILCNT, ~0xFF, 0x72);
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b43_ntab_write(dev, B43_NTAB16(8, 0x00), 2);
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b43_ntab_write(dev, B43_NTAB16(8, 0x10), 2);
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tmp32 = b43_ntab_read(dev, B43_NTAB32(30, 0));
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tmp32 &= 0xffffff;
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b43_ntab_write(dev, B43_NTAB32(30, 0), tmp32);
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b43_ntab_write_bulk(dev, B43_NTAB16(7, 0x15e), 2, ntab7_15e_16e);
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b43_ntab_write_bulk(dev, B43_NTAB16(7, 0x16e), 2, ntab7_15e_16e);
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if (b43_nphy_ipa(dev))
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b43_nphy_set_rf_sequence(dev, 0, rx2tx_events_ipa,
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rx2tx_delays_ipa, ARRAY_SIZE(rx2tx_events_ipa));
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b43_phy_maskset(dev, 0x299, 0x3FFF, 0x4000);
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b43_phy_maskset(dev, 0x29D, 0x3FFF, 0x4000);
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lpf_20 = b43_nphy_read_lpf_ctl(dev, 0x154);
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lpf_40 = b43_nphy_read_lpf_ctl(dev, 0x159);
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lpf_11b = b43_nphy_read_lpf_ctl(dev, 0x152);
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if (b43_nphy_ipa(dev)) {
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if ((phy->radio_rev == 5 && phy->is_40mhz) ||
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phy->radio_rev == 7 || phy->radio_rev == 8) {
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bcap_val = b43_radio_read(dev, 0x16b);
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scap_val = b43_radio_read(dev, 0x16a);
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scap_val_11b = scap_val;
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bcap_val_11b = bcap_val;
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if (phy->radio_rev == 5 && phy->is_40mhz) {
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scap_val_11n_20 = scap_val;
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bcap_val_11n_20 = bcap_val;
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scap_val_11n_40 = bcap_val_11n_40 = 0xc;
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rccal_ovrd = true;
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} else { /* Rev 7/8 */
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lpf_20 = 4;
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lpf_11b = 1;
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if (b43_current_band(dev->wl) == IEEE80211_BAND_2GHZ) {
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scap_val_11n_20 = 0xc;
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bcap_val_11n_20 = 0xc;
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scap_val_11n_40 = 0xa;
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bcap_val_11n_40 = 0xa;
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} else {
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scap_val_11n_20 = 0x14;
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bcap_val_11n_20 = 0x14;
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scap_val_11n_40 = 0xf;
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bcap_val_11n_40 = 0xf;
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}
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rccal_ovrd = true;
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}
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}
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} else {
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if (phy->radio_rev == 5) {
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lpf_20 = 1;
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lpf_40 = 3;
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bcap_val = b43_radio_read(dev, 0x16b);
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scap_val = b43_radio_read(dev, 0x16a);
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scap_val_11b = scap_val;
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bcap_val_11b = bcap_val;
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scap_val_11n_20 = 0x11;
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scap_val_11n_40 = 0x11;
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bcap_val_11n_20 = 0x13;
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bcap_val_11n_40 = 0x13;
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rccal_ovrd = true;
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}
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}
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if (rccal_ovrd) {
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rx2tx_lut_20_11b = (bcap_val_11b << 8) |
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(scap_val_11b << 3) |
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lpf_11b;
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rx2tx_lut_20_11n = (bcap_val_11n_20 << 8) |
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(scap_val_11n_20 << 3) |
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lpf_20;
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rx2tx_lut_40_11n = (bcap_val_11n_40 << 8) |
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(scap_val_11n_40 << 3) |
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lpf_40;
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for (core = 0; core < 2; core++) {
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b43_ntab_write(dev, B43_NTAB16(7, 0x152 + core * 16),
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rx2tx_lut_20_11b);
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b43_ntab_write(dev, B43_NTAB16(7, 0x153 + core * 16),
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rx2tx_lut_20_11n);
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b43_ntab_write(dev, B43_NTAB16(7, 0x154 + core * 16),
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rx2tx_lut_20_11n);
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b43_ntab_write(dev, B43_NTAB16(7, 0x155 + core * 16),
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rx2tx_lut_40_11n);
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b43_ntab_write(dev, B43_NTAB16(7, 0x156 + core * 16),
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rx2tx_lut_40_11n);
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b43_ntab_write(dev, B43_NTAB16(7, 0x157 + core * 16),
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rx2tx_lut_40_11n);
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b43_ntab_write(dev, B43_NTAB16(7, 0x158 + core * 16),
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rx2tx_lut_40_11n);
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b43_ntab_write(dev, B43_NTAB16(7, 0x159 + core * 16),
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rx2tx_lut_40_11n);
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}
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/* b43_nphy_rf_control_override_rev7(dev, 16, 1, 3, 0, 2); */
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}
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b43_phy_write(dev, 0x32F, 0x3);
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if (phy->radio_rev == 4 || phy->radio_rev == 6)
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; /* b43_nphy_rf_control_override_rev7(dev, 4, 1, 3, 0, 0); */
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if (phy->radio_rev == 3 || phy->radio_rev == 4 || phy->radio_rev == 6) {
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if (sprom->revision &&
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sprom->boardflags2_hi & B43_BFH2_IPALVLSHIFT_3P3) {
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b43_radio_write(dev, 0x5, 0x05);
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b43_radio_write(dev, 0x6, 0x30);
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b43_radio_write(dev, 0x7, 0x00);
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b43_radio_set(dev, 0x4f, 0x1);
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b43_radio_set(dev, 0xd4, 0x1);
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bias = 0x1f;
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conv = 0x6f;
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filt = 0xaa;
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} else {
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bias = 0x2b;
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conv = 0x7f;
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filt = 0xee;
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}
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if (b43_current_band(dev->wl) == IEEE80211_BAND_2GHZ) {
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for (core = 0; core < 2; core++) {
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if (core == 0) {
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b43_radio_write(dev, 0x5F, bias);
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b43_radio_write(dev, 0x64, conv);
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b43_radio_write(dev, 0x66, filt);
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} else {
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b43_radio_write(dev, 0xE8, bias);
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b43_radio_write(dev, 0xE9, conv);
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b43_radio_write(dev, 0xEB, filt);
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}
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}
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}
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}
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if (b43_nphy_ipa(dev)) {
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if (b43_current_band(dev->wl) == IEEE80211_BAND_2GHZ) {
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if (phy->radio_rev == 3 || phy->radio_rev == 4 ||
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phy->radio_rev == 6) {
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for (core = 0; core < 2; core++) {
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if (core == 0)
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b43_radio_write(dev, 0x51,
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0x7f);
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else
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b43_radio_write(dev, 0xd6,
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0x7f);
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}
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}
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if (phy->radio_rev == 3) {
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for (core = 0; core < 2; core++) {
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if (core == 0) {
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b43_radio_write(dev, 0x64,
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0x13);
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b43_radio_write(dev, 0x5F,
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0x1F);
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b43_radio_write(dev, 0x66,
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0xEE);
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b43_radio_write(dev, 0x59,
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0x8A);
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b43_radio_write(dev, 0x80,
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0x3E);
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} else {
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b43_radio_write(dev, 0x69,
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0x13);
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b43_radio_write(dev, 0xE8,
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0x1F);
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b43_radio_write(dev, 0xEB,
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0xEE);
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b43_radio_write(dev, 0xDE,
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0x8A);
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b43_radio_write(dev, 0x105,
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0x3E);
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}
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}
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} else if (phy->radio_rev == 7 || phy->radio_rev == 8) {
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if (!phy->is_40mhz) {
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b43_radio_write(dev, 0x5F, 0x14);
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b43_radio_write(dev, 0xE8, 0x12);
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} else {
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b43_radio_write(dev, 0x5F, 0x16);
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b43_radio_write(dev, 0xE8, 0x16);
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}
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}
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} else {
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u16 freq = phy->channel_freq;
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if ((freq >= 5180 && freq <= 5230) ||
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(freq >= 5745 && freq <= 5805)) {
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b43_radio_write(dev, 0x7D, 0xFF);
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b43_radio_write(dev, 0xFE, 0xFF);
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}
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}
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} else {
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if (phy->radio_rev != 5) {
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for (core = 0; core < 2; core++) {
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if (core == 0) {
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b43_radio_write(dev, 0x5c, 0x61);
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b43_radio_write(dev, 0x51, 0x70);
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} else {
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b43_radio_write(dev, 0xe1, 0x61);
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b43_radio_write(dev, 0xd6, 0x70);
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}
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}
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}
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}
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if (phy->radio_rev == 4) {
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b43_ntab_write(dev, B43_NTAB16(8, 0x05), 0x20);
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b43_ntab_write(dev, B43_NTAB16(8, 0x15), 0x20);
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for (core = 0; core < 2; core++) {
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if (core == 0) {
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b43_radio_write(dev, 0x1a1, 0x00);
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b43_radio_write(dev, 0x1a2, 0x3f);
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b43_radio_write(dev, 0x1a6, 0x3f);
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} else {
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b43_radio_write(dev, 0x1a7, 0x00);
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b43_radio_write(dev, 0x1ab, 0x3f);
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b43_radio_write(dev, 0x1ac, 0x3f);
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}
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}
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} else {
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b43_phy_set(dev, B43_NPHY_AFECTL_C1, 0x4);
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b43_phy_set(dev, B43_NPHY_AFECTL_OVER1, 0x4);
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b43_phy_set(dev, B43_NPHY_AFECTL_C2, 0x4);
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b43_phy_set(dev, B43_NPHY_AFECTL_OVER, 0x4);
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b43_phy_mask(dev, B43_NPHY_AFECTL_C1, ~0x1);
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b43_phy_set(dev, B43_NPHY_AFECTL_OVER1, 0x1);
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b43_phy_mask(dev, B43_NPHY_AFECTL_C2, ~0x1);
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b43_phy_set(dev, B43_NPHY_AFECTL_OVER, 0x1);
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b43_ntab_write(dev, B43_NTAB16(8, 0x05), 0x20);
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b43_ntab_write(dev, B43_NTAB16(8, 0x15), 0x20);
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b43_phy_mask(dev, B43_NPHY_AFECTL_C1, ~0x4);
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b43_phy_mask(dev, B43_NPHY_AFECTL_OVER1, ~0x4);
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b43_phy_mask(dev, B43_NPHY_AFECTL_C2, ~0x4);
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b43_phy_mask(dev, B43_NPHY_AFECTL_OVER, ~0x4);
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}
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b43_phy_write(dev, B43_NPHY_ENDROP_TLEN, 0x2);
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b43_ntab_write(dev, B43_NTAB32(16, 0x100), 20);
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b43_ntab_write_bulk(dev, B43_NTAB16(7, 0x138), 2, ntab7_138_146);
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b43_ntab_write(dev, B43_NTAB16(7, 0x141), 0x77);
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b43_ntab_write_bulk(dev, B43_NTAB16(7, 0x133), 3, ntab7_133);
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b43_ntab_write_bulk(dev, B43_NTAB16(7, 0x146), 2, ntab7_138_146);
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b43_ntab_write(dev, B43_NTAB16(7, 0x123), 0x77);
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b43_ntab_write(dev, B43_NTAB16(7, 0x12A), 0x77);
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if (!phy->is_40mhz) {
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b43_ntab_write(dev, B43_NTAB32(16, 0x03), 0x18D);
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b43_ntab_write(dev, B43_NTAB32(16, 0x7F), 0x18D);
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} else {
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b43_ntab_write(dev, B43_NTAB32(16, 0x03), 0x14D);
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b43_ntab_write(dev, B43_NTAB32(16, 0x7F), 0x14D);
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}
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b43_nphy_gain_ctl_workarounds(dev);
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/* TODO
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b43_ntab_write_bulk(dev, B43_NTAB16(8, 0x08), 4,
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aux_adc_vmid_rev7_core0);
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b43_ntab_write_bulk(dev, B43_NTAB16(8, 0x18), 4,
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aux_adc_vmid_rev7_core1);
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b43_ntab_write_bulk(dev, B43_NTAB16(8, 0x0C), 4,
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aux_adc_gain_rev7);
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b43_ntab_write_bulk(dev, B43_NTAB16(8, 0x1C), 4,
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aux_adc_gain_rev7);
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*/
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}
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static void b43_nphy_workarounds_rev3plus(struct b43_wldev *dev)
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{
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struct b43_phy_n *nphy = dev->phy.n;
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@ -2097,7 +2419,9 @@ static void b43_nphy_workarounds(struct b43_wldev *dev)
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b43_phy_set(dev, B43_NPHY_IQFLIP,
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B43_NPHY_IQFLIP_ADC1 | B43_NPHY_IQFLIP_ADC2);
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if (dev->phy.rev >= 3)
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if (dev->phy.rev >= 7)
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b43_nphy_workarounds_rev7plus(dev);
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else if (dev->phy.rev >= 3)
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b43_nphy_workarounds_rev3plus(dev);
|
||||
else
|
||||
b43_nphy_workarounds_rev1_2(dev);
|
||||
|
|
|
|||
Loading…
Reference in New Issue