drm/amd/pm: Removed fixed clock in auto mode DPM

SMU10_UMD_PSTATE_PEAK_FCLK value should not be used to set the DPM.

Suggested-by: Evan Quan <evan.quan@amd.com>
Reviewed-by: Evan Quan <evan.quan@amd.com>
Signed-off-by: Sudheesh Mavila <sudheesh.mavila@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
This commit is contained in:
Sudheesh Mavila 2020-09-15 12:48:20 +05:30 committed by Alex Deucher
parent 8d89b96fe7
commit d117413f5e
1 changed files with 6 additions and 4 deletions

View File

@ -563,6 +563,8 @@ static int smu10_dpm_force_dpm_level(struct pp_hwmgr *hwmgr,
struct smu10_hwmgr *data = hwmgr->backend; struct smu10_hwmgr *data = hwmgr->backend;
uint32_t min_sclk = hwmgr->display_config->min_core_set_clock; uint32_t min_sclk = hwmgr->display_config->min_core_set_clock;
uint32_t min_mclk = hwmgr->display_config->min_mem_set_clock/100; uint32_t min_mclk = hwmgr->display_config->min_mem_set_clock/100;
uint32_t index_fclk = data->clock_vol_info.vdd_dep_on_fclk->count - 1;
uint32_t index_socclk = data->clock_vol_info.vdd_dep_on_socclk->count - 1;
if (hwmgr->smu_version < 0x1E3700) { if (hwmgr->smu_version < 0x1E3700) {
pr_info("smu firmware version too old, can not set dpm level\n"); pr_info("smu firmware version too old, can not set dpm level\n");
@ -676,13 +678,13 @@ static int smu10_dpm_force_dpm_level(struct pp_hwmgr *hwmgr,
smum_send_msg_to_smc_with_parameter(hwmgr, smum_send_msg_to_smc_with_parameter(hwmgr,
PPSMC_MSG_SetHardMinFclkByFreq, PPSMC_MSG_SetHardMinFclkByFreq,
hwmgr->display_config->num_display > 3 ? hwmgr->display_config->num_display > 3 ?
SMU10_UMD_PSTATE_PEAK_FCLK : data->clock_vol_info.vdd_dep_on_fclk->entries[0].clk :
min_mclk, min_mclk,
NULL); NULL);
smum_send_msg_to_smc_with_parameter(hwmgr, smum_send_msg_to_smc_with_parameter(hwmgr,
PPSMC_MSG_SetHardMinSocclkByFreq, PPSMC_MSG_SetHardMinSocclkByFreq,
SMU10_UMD_PSTATE_MIN_SOCCLK, data->clock_vol_info.vdd_dep_on_socclk->entries[0].clk,
NULL); NULL);
smum_send_msg_to_smc_with_parameter(hwmgr, smum_send_msg_to_smc_with_parameter(hwmgr,
PPSMC_MSG_SetHardMinVcn, PPSMC_MSG_SetHardMinVcn,
@ -695,11 +697,11 @@ static int smu10_dpm_force_dpm_level(struct pp_hwmgr *hwmgr,
NULL); NULL);
smum_send_msg_to_smc_with_parameter(hwmgr, smum_send_msg_to_smc_with_parameter(hwmgr,
PPSMC_MSG_SetSoftMaxFclkByFreq, PPSMC_MSG_SetSoftMaxFclkByFreq,
SMU10_UMD_PSTATE_PEAK_FCLK, data->clock_vol_info.vdd_dep_on_fclk->entries[index_fclk].clk,
NULL); NULL);
smum_send_msg_to_smc_with_parameter(hwmgr, smum_send_msg_to_smc_with_parameter(hwmgr,
PPSMC_MSG_SetSoftMaxSocclkByFreq, PPSMC_MSG_SetSoftMaxSocclkByFreq,
SMU10_UMD_PSTATE_PEAK_SOCCLK, data->clock_vol_info.vdd_dep_on_socclk->entries[index_socclk].clk,
NULL); NULL);
smum_send_msg_to_smc_with_parameter(hwmgr, smum_send_msg_to_smc_with_parameter(hwmgr,
PPSMC_MSG_SetSoftMaxVcn, PPSMC_MSG_SetSoftMaxVcn,