drm/nouveau: give a slightly larger pci(e)gart aperture on all chipsets
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
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78c2018658
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@ -341,10 +341,10 @@ nouveau_sgdma_init(struct drm_device *dev)
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u32 aper_size, align;
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int ret;
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if (dev_priv->card_type >= NV_40 && pci_is_pcie(dev->pdev))
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if (dev_priv->card_type >= NV_40)
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aper_size = 512 * 1024 * 1024;
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else
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aper_size = 64 * 1024 * 1024;
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aper_size = 128 * 1024 * 1024;
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/* Dear NVIDIA, NV44+ would like proper present bits in PTEs for
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* christmas. The cards before it have them, the cards after
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@ -41,12 +41,8 @@ int nv04_instmem_init(struct drm_device *dev)
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rsvd += 16 * 1024;
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rsvd *= dev_priv->engine.fifo.channels;
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/* pciegart table */
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if (pci_is_pcie(dev->pdev))
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rsvd += 512 * 1024;
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/* object storage */
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rsvd += 512 * 1024;
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rsvd += 512 * 1024; /* pci(e)gart table */
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rsvd += 512 * 1024; /* object storage */
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dev_priv->ramin_rsvd_vram = round_up(rsvd, 4096);
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} else {
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