drm/radeon/kms: add PLL flag to prefer frequencies <= the target freq
This is needed when using fractional feedback dividers on some IGP chips. Signed-off-by: Alex Deucher <alexdeucher@gmail.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
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@ -491,7 +491,11 @@ void radeon_compute_pll(struct radeon_pll *pll,
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tmp += (uint64_t)pll->reference_freq * 1000 * frac_feedback_div;
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current_freq = radeon_div(tmp, ref_div * post_div);
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error = abs(current_freq - freq);
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if (flags & RADEON_PLL_PREFER_CLOSEST_LOWER) {
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error = freq - current_freq;
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error = error < 0 ? 0xffffffff : error;
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} else
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error = abs(current_freq - freq);
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vco_diff = abs(vco - best_vco);
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if ((best_vco == 0 && error < best_error) ||
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@ -124,6 +124,7 @@ struct radeon_tmds_pll {
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#define RADEON_PLL_PREFER_LOW_POST_DIV (1 << 8)
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#define RADEON_PLL_PREFER_HIGH_POST_DIV (1 << 9)
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#define RADEON_PLL_USE_FRAC_FB_DIV (1 << 10)
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#define RADEON_PLL_PREFER_CLOSEST_LOWER (1 << 11)
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struct radeon_pll {
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uint16_t reference_freq;
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