KVM: ppc: split out common Book E instruction emulation
The Book E code will be shared with e500. I've left PID in kvmppc_core_emulate_op() just so that we don't need to move kvmppc_set_pid() right now. Once we have the e500 implementation, we can probably share that too. Signed-off-by: Hollis Blanchard <hollisb@us.ibm.com> Signed-off-by: Avi Kivity <avi@redhat.com>
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d0c7dc0344
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@ -27,25 +27,12 @@
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#include "booke.h"
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#include "44x_tlb.h"
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#define OP_RFI 19
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#define XOP_RFI 50
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#define XOP_MFMSR 83
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#define XOP_WRTEE 131
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#define XOP_MTMSR 146
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#define XOP_WRTEEI 163
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#define XOP_MFDCR 323
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#define XOP_MTDCR 451
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#define XOP_TLBSX 914
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#define XOP_ICCCI 966
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#define XOP_TLBWE 978
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static void kvmppc_emul_rfi(struct kvm_vcpu *vcpu)
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{
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vcpu->arch.pc = vcpu->arch.srr0;
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kvmppc_set_msr(vcpu, vcpu->arch.srr1);
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}
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int kvmppc_core_emulate_op(struct kvm_run *run, struct kvm_vcpu *vcpu,
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unsigned int inst, int *advance)
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{
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@ -59,48 +46,9 @@ int kvmppc_core_emulate_op(struct kvm_run *run, struct kvm_vcpu *vcpu,
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int ws;
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switch (get_op(inst)) {
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case OP_RFI:
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switch (get_xop(inst)) {
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case XOP_RFI:
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kvmppc_emul_rfi(vcpu);
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kvmppc_set_exit_type(vcpu, EMULATED_RFI_EXITS);
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*advance = 0;
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break;
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default:
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emulated = EMULATE_FAIL;
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break;
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}
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break;
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case 31:
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switch (get_xop(inst)) {
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case XOP_MFMSR:
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rt = get_rt(inst);
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vcpu->arch.gpr[rt] = vcpu->arch.msr;
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kvmppc_set_exit_type(vcpu, EMULATED_MFMSR_EXITS);
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break;
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case XOP_MTMSR:
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rs = get_rs(inst);
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kvmppc_set_exit_type(vcpu, EMULATED_MTMSR_EXITS);
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kvmppc_set_msr(vcpu, vcpu->arch.gpr[rs]);
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break;
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case XOP_WRTEE:
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rs = get_rs(inst);
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vcpu->arch.msr = (vcpu->arch.msr & ~MSR_EE)
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| (vcpu->arch.gpr[rs] & MSR_EE);
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kvmppc_set_exit_type(vcpu, EMULATED_WRTEE_EXITS);
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break;
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case XOP_WRTEEI:
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vcpu->arch.msr = (vcpu->arch.msr & ~MSR_EE)
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| (inst & MSR_EE);
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kvmppc_set_exit_type(vcpu, EMULATED_WRTEE_EXITS);
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break;
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case XOP_MFDCR:
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dcrn = get_dcrn(inst);
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rt = get_rt(inst);
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@ -186,186 +134,51 @@ int kvmppc_core_emulate_op(struct kvm_run *run, struct kvm_vcpu *vcpu,
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emulated = EMULATE_FAIL;
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}
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if (emulated == EMULATE_FAIL)
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emulated = kvmppc_booke_emulate_op(run, vcpu, inst, advance);
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return emulated;
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}
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int kvmppc_core_emulate_mtspr(struct kvm_vcpu *vcpu, int sprn, int rs)
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{
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int emulated = EMULATE_DONE;
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switch (sprn) {
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case SPRN_MMUCR:
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vcpu->arch.mmucr = vcpu->arch.gpr[rs]; break;
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case SPRN_PID:
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kvmppc_set_pid(vcpu, vcpu->arch.gpr[rs]); break;
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case SPRN_MMUCR:
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vcpu->arch.mmucr = vcpu->arch.gpr[rs]; break;
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case SPRN_CCR0:
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vcpu->arch.ccr0 = vcpu->arch.gpr[rs]; break;
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case SPRN_CCR1:
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vcpu->arch.ccr1 = vcpu->arch.gpr[rs]; break;
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case SPRN_DEAR:
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vcpu->arch.dear = vcpu->arch.gpr[rs]; break;
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case SPRN_ESR:
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vcpu->arch.esr = vcpu->arch.gpr[rs]; break;
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case SPRN_DBCR0:
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vcpu->arch.dbcr0 = vcpu->arch.gpr[rs]; break;
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case SPRN_DBCR1:
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vcpu->arch.dbcr1 = vcpu->arch.gpr[rs]; break;
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case SPRN_TSR:
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vcpu->arch.tsr &= ~vcpu->arch.gpr[rs]; break;
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case SPRN_TCR:
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vcpu->arch.tcr = vcpu->arch.gpr[rs];
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kvmppc_emulate_dec(vcpu);
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break;
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/* Note: SPRG4-7 are user-readable. These values are
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* loaded into the real SPRGs when resuming the
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* guest. */
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case SPRN_SPRG4:
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vcpu->arch.sprg4 = vcpu->arch.gpr[rs]; break;
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case SPRN_SPRG5:
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vcpu->arch.sprg5 = vcpu->arch.gpr[rs]; break;
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case SPRN_SPRG6:
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vcpu->arch.sprg6 = vcpu->arch.gpr[rs]; break;
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case SPRN_SPRG7:
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vcpu->arch.sprg7 = vcpu->arch.gpr[rs]; break;
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case SPRN_IVPR:
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vcpu->arch.ivpr = vcpu->arch.gpr[rs];
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break;
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case SPRN_IVOR0:
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vcpu->arch.ivor[BOOKE_IRQPRIO_CRITICAL] = vcpu->arch.gpr[rs];
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break;
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case SPRN_IVOR1:
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vcpu->arch.ivor[BOOKE_IRQPRIO_MACHINE_CHECK] = vcpu->arch.gpr[rs];
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break;
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case SPRN_IVOR2:
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vcpu->arch.ivor[BOOKE_IRQPRIO_DATA_STORAGE] = vcpu->arch.gpr[rs];
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break;
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case SPRN_IVOR3:
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vcpu->arch.ivor[BOOKE_IRQPRIO_INST_STORAGE] = vcpu->arch.gpr[rs];
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break;
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case SPRN_IVOR4:
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vcpu->arch.ivor[BOOKE_IRQPRIO_EXTERNAL] = vcpu->arch.gpr[rs];
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break;
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case SPRN_IVOR5:
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vcpu->arch.ivor[BOOKE_IRQPRIO_ALIGNMENT] = vcpu->arch.gpr[rs];
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break;
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case SPRN_IVOR6:
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vcpu->arch.ivor[BOOKE_IRQPRIO_PROGRAM] = vcpu->arch.gpr[rs];
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break;
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case SPRN_IVOR7:
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vcpu->arch.ivor[BOOKE_IRQPRIO_FP_UNAVAIL] = vcpu->arch.gpr[rs];
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break;
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case SPRN_IVOR8:
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vcpu->arch.ivor[BOOKE_IRQPRIO_SYSCALL] = vcpu->arch.gpr[rs];
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break;
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case SPRN_IVOR9:
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vcpu->arch.ivor[BOOKE_IRQPRIO_AP_UNAVAIL] = vcpu->arch.gpr[rs];
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break;
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case SPRN_IVOR10:
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vcpu->arch.ivor[BOOKE_IRQPRIO_DECREMENTER] = vcpu->arch.gpr[rs];
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break;
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case SPRN_IVOR11:
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vcpu->arch.ivor[BOOKE_IRQPRIO_FIT] = vcpu->arch.gpr[rs];
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break;
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case SPRN_IVOR12:
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vcpu->arch.ivor[BOOKE_IRQPRIO_WATCHDOG] = vcpu->arch.gpr[rs];
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break;
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case SPRN_IVOR13:
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vcpu->arch.ivor[BOOKE_IRQPRIO_DTLB_MISS] = vcpu->arch.gpr[rs];
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break;
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case SPRN_IVOR14:
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vcpu->arch.ivor[BOOKE_IRQPRIO_ITLB_MISS] = vcpu->arch.gpr[rs];
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break;
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case SPRN_IVOR15:
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vcpu->arch.ivor[BOOKE_IRQPRIO_DEBUG] = vcpu->arch.gpr[rs];
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break;
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default:
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return EMULATE_FAIL;
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emulated = kvmppc_booke_emulate_mtspr(vcpu, sprn, rs);
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}
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kvmppc_set_exit_type(vcpu, EMULATED_MTSPR_EXITS);
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return EMULATE_DONE;
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return emulated;
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}
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int kvmppc_core_emulate_mfspr(struct kvm_vcpu *vcpu, int sprn, int rt)
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{
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int emulated = EMULATE_DONE;
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switch (sprn) {
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/* 440 */
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case SPRN_PID:
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vcpu->arch.gpr[rt] = vcpu->arch.pid; break;
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case SPRN_MMUCR:
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vcpu->arch.gpr[rt] = vcpu->arch.mmucr; break;
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case SPRN_CCR0:
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vcpu->arch.gpr[rt] = vcpu->arch.ccr0; break;
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case SPRN_CCR1:
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vcpu->arch.gpr[rt] = vcpu->arch.ccr1; break;
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/* Book E */
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case SPRN_PID:
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vcpu->arch.gpr[rt] = vcpu->arch.pid; break;
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case SPRN_IVPR:
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vcpu->arch.gpr[rt] = vcpu->arch.ivpr; break;
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case SPRN_DEAR:
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vcpu->arch.gpr[rt] = vcpu->arch.dear; break;
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case SPRN_ESR:
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vcpu->arch.gpr[rt] = vcpu->arch.esr; break;
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case SPRN_DBCR0:
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vcpu->arch.gpr[rt] = vcpu->arch.dbcr0; break;
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case SPRN_DBCR1:
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vcpu->arch.gpr[rt] = vcpu->arch.dbcr1; break;
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case SPRN_IVOR0:
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vcpu->arch.gpr[rt] = vcpu->arch.ivor[BOOKE_IRQPRIO_CRITICAL];
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break;
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case SPRN_IVOR1:
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vcpu->arch.gpr[rt] = vcpu->arch.ivor[BOOKE_IRQPRIO_MACHINE_CHECK];
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break;
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case SPRN_IVOR2:
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vcpu->arch.gpr[rt] = vcpu->arch.ivor[BOOKE_IRQPRIO_DATA_STORAGE];
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break;
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case SPRN_IVOR3:
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vcpu->arch.gpr[rt] = vcpu->arch.ivor[BOOKE_IRQPRIO_INST_STORAGE];
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break;
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case SPRN_IVOR4:
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vcpu->arch.gpr[rt] = vcpu->arch.ivor[BOOKE_IRQPRIO_EXTERNAL];
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break;
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case SPRN_IVOR5:
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vcpu->arch.gpr[rt] = vcpu->arch.ivor[BOOKE_IRQPRIO_ALIGNMENT];
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break;
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case SPRN_IVOR6:
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vcpu->arch.gpr[rt] = vcpu->arch.ivor[BOOKE_IRQPRIO_PROGRAM];
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break;
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case SPRN_IVOR7:
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vcpu->arch.gpr[rt] = vcpu->arch.ivor[BOOKE_IRQPRIO_FP_UNAVAIL];
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break;
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case SPRN_IVOR8:
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vcpu->arch.gpr[rt] = vcpu->arch.ivor[BOOKE_IRQPRIO_SYSCALL];
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break;
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case SPRN_IVOR9:
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vcpu->arch.gpr[rt] = vcpu->arch.ivor[BOOKE_IRQPRIO_AP_UNAVAIL];
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break;
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case SPRN_IVOR10:
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vcpu->arch.gpr[rt] = vcpu->arch.ivor[BOOKE_IRQPRIO_DECREMENTER];
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break;
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case SPRN_IVOR11:
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vcpu->arch.gpr[rt] = vcpu->arch.ivor[BOOKE_IRQPRIO_FIT];
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break;
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case SPRN_IVOR12:
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vcpu->arch.gpr[rt] = vcpu->arch.ivor[BOOKE_IRQPRIO_WATCHDOG];
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break;
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case SPRN_IVOR13:
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vcpu->arch.gpr[rt] = vcpu->arch.ivor[BOOKE_IRQPRIO_DTLB_MISS];
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break;
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case SPRN_IVOR14:
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vcpu->arch.gpr[rt] = vcpu->arch.ivor[BOOKE_IRQPRIO_ITLB_MISS];
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break;
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case SPRN_IVOR15:
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vcpu->arch.gpr[rt] = vcpu->arch.ivor[BOOKE_IRQPRIO_DEBUG];
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break;
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default:
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return EMULATE_FAIL;
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emulated = kvmppc_booke_emulate_mfspr(vcpu, sprn, rt);
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}
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kvmppc_set_exit_type(vcpu, EMULATED_MFSPR_EXITS);
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return EMULATE_DONE;
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return emulated;
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}
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@ -16,6 +16,7 @@ AFLAGS_booke_interrupts.o := -I$(obj)
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kvm-440-objs := \
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booke.o \
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booke_emulate.o \
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booke_interrupts.o \
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44x.o \
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44x_tlb.o \
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@ -22,6 +22,7 @@
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#include <linux/types.h>
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#include <linux/kvm_host.h>
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#include <asm/kvm_ppc.h>
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#include "timing.h"
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/* interrupt priortity ordering */
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@ -57,4 +58,9 @@ static inline void kvmppc_set_msr(struct kvm_vcpu *vcpu, u32 new_msr)
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};
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}
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int kvmppc_booke_emulate_op(struct kvm_run *run, struct kvm_vcpu *vcpu,
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unsigned int inst, int *advance);
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int kvmppc_booke_emulate_mfspr(struct kvm_vcpu *vcpu, int sprn, int rt);
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int kvmppc_booke_emulate_mtspr(struct kvm_vcpu *vcpu, int sprn, int rs);
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#endif /* __KVM_BOOKE_H__ */
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@ -0,0 +1,262 @@
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/*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License, version 2, as
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* published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA.
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*
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* Copyright IBM Corp. 2008
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*
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* Authors: Hollis Blanchard <hollisb@us.ibm.com>
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*/
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#include <linux/kvm_host.h>
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#include <asm/disassemble.h>
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#include "booke.h"
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#define OP_19_XOP_RFI 50
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#define OP_31_XOP_MFMSR 83
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#define OP_31_XOP_WRTEE 131
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#define OP_31_XOP_MTMSR 146
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#define OP_31_XOP_WRTEEI 163
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static void kvmppc_emul_rfi(struct kvm_vcpu *vcpu)
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{
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vcpu->arch.pc = vcpu->arch.srr0;
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kvmppc_set_msr(vcpu, vcpu->arch.srr1);
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}
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int kvmppc_booke_emulate_op(struct kvm_run *run, struct kvm_vcpu *vcpu,
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unsigned int inst, int *advance)
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{
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int emulated = EMULATE_DONE;
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int rs;
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int rt;
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switch (get_op(inst)) {
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case 19:
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switch (get_xop(inst)) {
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case OP_19_XOP_RFI:
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kvmppc_emul_rfi(vcpu);
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kvmppc_set_exit_type(vcpu, EMULATED_RFI_EXITS);
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*advance = 0;
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break;
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default:
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emulated = EMULATE_FAIL;
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break;
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}
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break;
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case 31:
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switch (get_xop(inst)) {
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case OP_31_XOP_MFMSR:
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rt = get_rt(inst);
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vcpu->arch.gpr[rt] = vcpu->arch.msr;
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kvmppc_set_exit_type(vcpu, EMULATED_MFMSR_EXITS);
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break;
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case OP_31_XOP_MTMSR:
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rs = get_rs(inst);
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kvmppc_set_exit_type(vcpu, EMULATED_MTMSR_EXITS);
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kvmppc_set_msr(vcpu, vcpu->arch.gpr[rs]);
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break;
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case OP_31_XOP_WRTEE:
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rs = get_rs(inst);
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vcpu->arch.msr = (vcpu->arch.msr & ~MSR_EE)
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| (vcpu->arch.gpr[rs] & MSR_EE);
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kvmppc_set_exit_type(vcpu, EMULATED_WRTEE_EXITS);
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break;
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case OP_31_XOP_WRTEEI:
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vcpu->arch.msr = (vcpu->arch.msr & ~MSR_EE)
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| (inst & MSR_EE);
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kvmppc_set_exit_type(vcpu, EMULATED_WRTEE_EXITS);
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break;
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default:
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emulated = EMULATE_FAIL;
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}
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break;
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default:
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emulated = EMULATE_FAIL;
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}
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return emulated;
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}
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int kvmppc_booke_emulate_mtspr(struct kvm_vcpu *vcpu, int sprn, int rs)
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{
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int emulated = EMULATE_DONE;
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switch (sprn) {
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case SPRN_DEAR:
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vcpu->arch.dear = vcpu->arch.gpr[rs]; break;
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case SPRN_ESR:
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||||
vcpu->arch.esr = vcpu->arch.gpr[rs]; break;
|
||||
case SPRN_DBCR0:
|
||||
vcpu->arch.dbcr0 = vcpu->arch.gpr[rs]; break;
|
||||
case SPRN_DBCR1:
|
||||
vcpu->arch.dbcr1 = vcpu->arch.gpr[rs]; break;
|
||||
case SPRN_TSR:
|
||||
vcpu->arch.tsr &= ~vcpu->arch.gpr[rs]; break;
|
||||
case SPRN_TCR:
|
||||
vcpu->arch.tcr = vcpu->arch.gpr[rs];
|
||||
kvmppc_emulate_dec(vcpu);
|
||||
break;
|
||||
|
||||
/* Note: SPRG4-7 are user-readable. These values are
|
||||
* loaded into the real SPRGs when resuming the
|
||||
* guest. */
|
||||
case SPRN_SPRG4:
|
||||
vcpu->arch.sprg4 = vcpu->arch.gpr[rs]; break;
|
||||
case SPRN_SPRG5:
|
||||
vcpu->arch.sprg5 = vcpu->arch.gpr[rs]; break;
|
||||
case SPRN_SPRG6:
|
||||
vcpu->arch.sprg6 = vcpu->arch.gpr[rs]; break;
|
||||
case SPRN_SPRG7:
|
||||
vcpu->arch.sprg7 = vcpu->arch.gpr[rs]; break;
|
||||
|
||||
case SPRN_IVPR:
|
||||
vcpu->arch.ivpr = vcpu->arch.gpr[rs];
|
||||
break;
|
||||
case SPRN_IVOR0:
|
||||
vcpu->arch.ivor[BOOKE_IRQPRIO_CRITICAL] = vcpu->arch.gpr[rs];
|
||||
break;
|
||||
case SPRN_IVOR1:
|
||||
vcpu->arch.ivor[BOOKE_IRQPRIO_MACHINE_CHECK] = vcpu->arch.gpr[rs];
|
||||
break;
|
||||
case SPRN_IVOR2:
|
||||
vcpu->arch.ivor[BOOKE_IRQPRIO_DATA_STORAGE] = vcpu->arch.gpr[rs];
|
||||
break;
|
||||
case SPRN_IVOR3:
|
||||
vcpu->arch.ivor[BOOKE_IRQPRIO_INST_STORAGE] = vcpu->arch.gpr[rs];
|
||||
break;
|
||||
case SPRN_IVOR4:
|
||||
vcpu->arch.ivor[BOOKE_IRQPRIO_EXTERNAL] = vcpu->arch.gpr[rs];
|
||||
break;
|
||||
case SPRN_IVOR5:
|
||||
vcpu->arch.ivor[BOOKE_IRQPRIO_ALIGNMENT] = vcpu->arch.gpr[rs];
|
||||
break;
|
||||
case SPRN_IVOR6:
|
||||
vcpu->arch.ivor[BOOKE_IRQPRIO_PROGRAM] = vcpu->arch.gpr[rs];
|
||||
break;
|
||||
case SPRN_IVOR7:
|
||||
vcpu->arch.ivor[BOOKE_IRQPRIO_FP_UNAVAIL] = vcpu->arch.gpr[rs];
|
||||
break;
|
||||
case SPRN_IVOR8:
|
||||
vcpu->arch.ivor[BOOKE_IRQPRIO_SYSCALL] = vcpu->arch.gpr[rs];
|
||||
break;
|
||||
case SPRN_IVOR9:
|
||||
vcpu->arch.ivor[BOOKE_IRQPRIO_AP_UNAVAIL] = vcpu->arch.gpr[rs];
|
||||
break;
|
||||
case SPRN_IVOR10:
|
||||
vcpu->arch.ivor[BOOKE_IRQPRIO_DECREMENTER] = vcpu->arch.gpr[rs];
|
||||
break;
|
||||
case SPRN_IVOR11:
|
||||
vcpu->arch.ivor[BOOKE_IRQPRIO_FIT] = vcpu->arch.gpr[rs];
|
||||
break;
|
||||
case SPRN_IVOR12:
|
||||
vcpu->arch.ivor[BOOKE_IRQPRIO_WATCHDOG] = vcpu->arch.gpr[rs];
|
||||
break;
|
||||
case SPRN_IVOR13:
|
||||
vcpu->arch.ivor[BOOKE_IRQPRIO_DTLB_MISS] = vcpu->arch.gpr[rs];
|
||||
break;
|
||||
case SPRN_IVOR14:
|
||||
vcpu->arch.ivor[BOOKE_IRQPRIO_ITLB_MISS] = vcpu->arch.gpr[rs];
|
||||
break;
|
||||
case SPRN_IVOR15:
|
||||
vcpu->arch.ivor[BOOKE_IRQPRIO_DEBUG] = vcpu->arch.gpr[rs];
|
||||
break;
|
||||
|
||||
default:
|
||||
emulated = EMULATE_FAIL;
|
||||
}
|
||||
|
||||
return emulated;
|
||||
}
|
||||
|
||||
int kvmppc_booke_emulate_mfspr(struct kvm_vcpu *vcpu, int sprn, int rt)
|
||||
{
|
||||
int emulated = EMULATE_DONE;
|
||||
|
||||
switch (sprn) {
|
||||
case SPRN_IVPR:
|
||||
vcpu->arch.gpr[rt] = vcpu->arch.ivpr; break;
|
||||
case SPRN_DEAR:
|
||||
vcpu->arch.gpr[rt] = vcpu->arch.dear; break;
|
||||
case SPRN_ESR:
|
||||
vcpu->arch.gpr[rt] = vcpu->arch.esr; break;
|
||||
case SPRN_DBCR0:
|
||||
vcpu->arch.gpr[rt] = vcpu->arch.dbcr0; break;
|
||||
case SPRN_DBCR1:
|
||||
vcpu->arch.gpr[rt] = vcpu->arch.dbcr1; break;
|
||||
|
||||
case SPRN_IVOR0:
|
||||
vcpu->arch.gpr[rt] = vcpu->arch.ivor[BOOKE_IRQPRIO_CRITICAL];
|
||||
break;
|
||||
case SPRN_IVOR1:
|
||||
vcpu->arch.gpr[rt] = vcpu->arch.ivor[BOOKE_IRQPRIO_MACHINE_CHECK];
|
||||
break;
|
||||
case SPRN_IVOR2:
|
||||
vcpu->arch.gpr[rt] = vcpu->arch.ivor[BOOKE_IRQPRIO_DATA_STORAGE];
|
||||
break;
|
||||
case SPRN_IVOR3:
|
||||
vcpu->arch.gpr[rt] = vcpu->arch.ivor[BOOKE_IRQPRIO_INST_STORAGE];
|
||||
break;
|
||||
case SPRN_IVOR4:
|
||||
vcpu->arch.gpr[rt] = vcpu->arch.ivor[BOOKE_IRQPRIO_EXTERNAL];
|
||||
break;
|
||||
case SPRN_IVOR5:
|
||||
vcpu->arch.gpr[rt] = vcpu->arch.ivor[BOOKE_IRQPRIO_ALIGNMENT];
|
||||
break;
|
||||
case SPRN_IVOR6:
|
||||
vcpu->arch.gpr[rt] = vcpu->arch.ivor[BOOKE_IRQPRIO_PROGRAM];
|
||||
break;
|
||||
case SPRN_IVOR7:
|
||||
vcpu->arch.gpr[rt] = vcpu->arch.ivor[BOOKE_IRQPRIO_FP_UNAVAIL];
|
||||
break;
|
||||
case SPRN_IVOR8:
|
||||
vcpu->arch.gpr[rt] = vcpu->arch.ivor[BOOKE_IRQPRIO_SYSCALL];
|
||||
break;
|
||||
case SPRN_IVOR9:
|
||||
vcpu->arch.gpr[rt] = vcpu->arch.ivor[BOOKE_IRQPRIO_AP_UNAVAIL];
|
||||
break;
|
||||
case SPRN_IVOR10:
|
||||
vcpu->arch.gpr[rt] = vcpu->arch.ivor[BOOKE_IRQPRIO_DECREMENTER];
|
||||
break;
|
||||
case SPRN_IVOR11:
|
||||
vcpu->arch.gpr[rt] = vcpu->arch.ivor[BOOKE_IRQPRIO_FIT];
|
||||
break;
|
||||
case SPRN_IVOR12:
|
||||
vcpu->arch.gpr[rt] = vcpu->arch.ivor[BOOKE_IRQPRIO_WATCHDOG];
|
||||
break;
|
||||
case SPRN_IVOR13:
|
||||
vcpu->arch.gpr[rt] = vcpu->arch.ivor[BOOKE_IRQPRIO_DTLB_MISS];
|
||||
break;
|
||||
case SPRN_IVOR14:
|
||||
vcpu->arch.gpr[rt] = vcpu->arch.ivor[BOOKE_IRQPRIO_ITLB_MISS];
|
||||
break;
|
||||
case SPRN_IVOR15:
|
||||
vcpu->arch.gpr[rt] = vcpu->arch.ivor[BOOKE_IRQPRIO_DEBUG];
|
||||
break;
|
||||
|
||||
default:
|
||||
emulated = EMULATE_FAIL;
|
||||
}
|
||||
|
||||
return emulated;
|
||||
}
|
Loading…
Reference in New Issue