devicetree: Add binding for Sigma Designs SMP86xx interrupt controller
This adds a binding for the secondary interrupt controller in Sigma Designs SMP86xx and SMP87xx chips. Signed-off-by: Mans Rullgard <mans@mansr.com> [ jac: use 'interrupt-controller@XXX' notation in binding doc ] Acked-by: Rob Herring <robh@kernel.org> Link: https://lkml.kernel.org/r/1453313237-18570-1-git-send-email-mans@mansr.com Signed-off-by: Jason Cooper <jason@lakedaemon.net>
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Sigma Designs SMP86xx/SMP87xx secondary interrupt controller
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Required properties:
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- compatible: should be "sigma,smp8642-intc"
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- reg: physical address of MMIO region
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- ranges: address space mapping of child nodes
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- interrupt-parent: phandle of parent interrupt controller
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- interrupt-controller: boolean
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- #address-cells: should be <1>
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- #size-cells: should be <1>
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One child node per control block with properties:
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- reg: address of registers for this control block
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- interrupt-controller: boolean
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- #interrupt-cells: should be <2>, interrupt index and flags per interrupts.txt
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- interrupts: interrupt spec of primary interrupt controller
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Example:
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interrupt-controller@6e000 {
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compatible = "sigma,smp8642-intc";
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reg = <0x6e000 0x400>;
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ranges = <0x0 0x6e000 0x400>;
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interrupt-parent = <&gic>;
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interrupt-controller;
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#address-cells = <1>;
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#size-cells = <1>;
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irq0: interrupt-controller@0 {
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reg = <0x000 0x100>;
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interrupt-controller;
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#interrupt-cells = <2>;
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interrupts = <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>;
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};
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irq1: interrupt-controller@100 {
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reg = <0x100 0x100>;
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interrupt-controller;
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#interrupt-cells = <2>;
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interrupts = <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>;
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};
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irq2: interrupt-controller@300 {
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reg = <0x300 0x100>;
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interrupt-controller;
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#interrupt-cells = <2>;
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interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>;
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};
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};
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