mvebu dt64 for 4.12 (part 2)
- crypto engine description for the Armada 7k/8k SoCs and the boards using it - SDHCI description for the Armada 37xx and 7k/8k SoCs and the boards using it -----BEGIN PGP SIGNATURE----- iIEEABECAEEWIQQYqXDMF3cvSLY+g9cLBhiOFHI71QUCWO+ljCMcZ3JlZ29yeS5j bGVtZW50QGZyZWUtZWxlY3Ryb25zLmNvbQAKCRALBhiOFHI71Q9dAJ4i+PBERM8X wh0AI0kekOBF33L4YQCcDr5wYXQdCYgwnTBVYadOHvce61A= =zSnq -----END PGP SIGNATURE----- Merge tag 'mvebu-dt64-4.12-2' of git://git.infradead.org/linux-mvebu into next/dt64 mvebu dt64 for 4.12 (part 2) - crypto engine description for the Armada 7k/8k SoCs and the boards using it - SDHCI description for the Armada 37xx and 7k/8k SoCs and the boards using it * tag 'mvebu-dt64-4.12-2' of git://git.infradead.org/linux-mvebu: arm64: marvell: dts: enable the crypto engine on the Armada 8040 DB arm64: marvell: dts: enable the crypto engine on the Armada 7040 DB arm64: marvell: dts: add crypto engine description for 7k/8k arm64: dts: marvell: add sdhci support for Armada 7K/8K arm64: dts: marvell: add eMMC support for Armada 37xx Signed-off-by: Olof Johansson <olof@lixom.net>
This commit is contained in:
commit
d0815dfd91
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@ -146,6 +146,15 @@
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status = "okay";
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};
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&sdhci0 {
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non-removable;
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bus-width = <8>;
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mmc-ddr-1_8v;
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mmc-hs400-1_8v;
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marvell,pad-type = "fixed-1-8v";
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status = "okay";
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};
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/* CON31 */
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&usb3 {
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status = "okay";
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@ -218,6 +218,17 @@
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};
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};
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sdhci0: sdhci@d8000 {
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compatible = "marvell,armada-3700-sdhci",
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"marvell,sdhci-xenon";
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reg = <0xd8000 0x300
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0x17808 0x4>;
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interrupts = <GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&nb_periph_clk 0>;
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clock-names = "core";
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status = "disabled";
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};
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sata: sata@e0000 {
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compatible = "marvell,armada-3700-ahci";
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reg = <0xe0000 0x2000>;
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@ -147,6 +147,20 @@
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status = "okay";
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};
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&ap_sdhci0 {
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status = "okay";
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bus-width = <4>;
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no-1-8-v;
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non-removable;
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};
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&cpm_sdhci0 {
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status = "okay";
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bus-width = <4>;
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no-1-8-v;
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non-removable;
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};
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&cpm_mdio {
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phy0: ethernet-phy@0 {
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reg = <0>;
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@ -171,3 +185,7 @@
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phy = <&phy1>;
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phy-mode = "rgmii-id";
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};
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&cpm_crypto {
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status = "okay";
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};
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@ -140,6 +140,10 @@
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phy-mode = "rgmii-id";
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};
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&cpm_crypto {
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status = "okay";
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};
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/* CON5 on CP1 expansion */
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&cps_pcie2 {
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status = "okay";
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@ -164,3 +168,15 @@
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&cps_usb3_1 {
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status = "okay";
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};
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&ap_sdhci0 {
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status = "okay";
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bus-width = <4>;
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non-removable;
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};
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&cpm_sdhci0 {
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status = "okay";
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bus-width = <8>;
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non-removable;
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};
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@ -229,6 +229,17 @@
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};
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ap_sdhci0: sdhci@6e0000 {
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compatible = "marvell,armada-ap806-sdhci";
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reg = <0x6e0000 0x300>;
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interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>;
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clock-names = "core";
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clocks = <&ap_syscon 4>;
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dma-coherent;
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marvell,xenon-phy-slow-mode;
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status = "disabled";
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};
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ap_syscon: system-controller@6f4000 {
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compatible = "marvell,ap806-system-controller",
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"syscon";
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@ -217,6 +217,32 @@
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clocks = <&cpm_syscon0 1 25>;
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status = "okay";
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};
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cpm_sdhci0: sdhci@780000 {
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compatible = "marvell,armada-cp110-sdhci";
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reg = <0x780000 0x300>;
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interrupts = <GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>;
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clock-names = "core";
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clocks = <&cpm_syscon0 1 4>;
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dma-coherent;
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status = "disabled";
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};
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cpm_crypto: crypto@800000 {
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compatible = "inside-secure,safexcel-eip197";
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reg = <0x800000 0x200000>;
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interrupts = <GIC_SPI 34 (IRQ_TYPE_EDGE_RISING
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| IRQ_TYPE_LEVEL_HIGH)>,
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<GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 56 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 58 IRQ_TYPE_LEVEL_HIGH>;
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interrupt-names = "mem", "ring0", "ring1",
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"ring2", "ring3", "eip";
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clocks = <&cpm_syscon0 1 26>;
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status = "disabled";
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};
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};
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cpm_pcie0: pcie@f2600000 {
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@ -217,6 +217,22 @@
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clocks = <&cps_syscon0 1 25>;
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status = "okay";
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};
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cps_crypto: crypto@800000 {
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compatible = "inside-secure,safexcel-eip197";
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reg = <0x800000 0x200000>;
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interrupts = <GIC_SPI 34 (IRQ_TYPE_EDGE_RISING
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| IRQ_TYPE_LEVEL_HIGH)>,
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<GIC_SPI 278 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 279 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 280 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 281 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 282 IRQ_TYPE_LEVEL_HIGH>;
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interrupt-names = "mem", "ring0", "ring1",
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"ring2", "ring3", "eip";
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clocks = <&cps_syscon0 1 26>;
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status = "disabled";
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};
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};
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cps_pcie0: pcie@f4600000 {
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