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pinctrl: sh-pfc: r8a77965: Add SATA pins, groups and functions 

This patch adds SATA0 pin, group and function to the R8A77965 SoC.

Signed-off-by: Takeshi Kihara <takeshi.kihara.df@renesas.com>
[wsa: rebased to upstream base]
Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Reviewed-by: Simon Horman <horms+renesas@verge.net.au>
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
This commit is contained in:
Takeshi Kihara 2018-07-25 21:15:46 +02:00 committed by Geert Uytterhoeven
parent 5b394b2ddf
commit d06e3be6e8
1 changed files with 27 additions and 0 deletions
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27
drivers/pinctrl/sh-pfc/pfc-r8a77965.c
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@ -2907,6 +2907,25 @@ static const unsigned int pwm6_b_mux[] = {
PWM6_B_MARK,
};
/* - SATA --------------------------------------------------------------------*/
static const unsigned int sata0_devslp_a_pins[] = {
/* DEVSLP */
RCAR_GP_PIN(6, 16),
};
static const unsigned int sata0_devslp_a_mux[] = {
SATA_DEVSLP_A_MARK,
};
static const unsigned int sata0_devslp_b_pins[] = {
/* DEVSLP */
RCAR_GP_PIN(4, 6),
};
static const unsigned int sata0_devslp_b_mux[] = {
SATA_DEVSLP_B_MARK,
};
/* - SCIF0 ------------------------------------------------------------------ */
static const unsigned int scif0_data_pins[] = {
/* RX, TX */
@ -3579,6 +3598,8 @@ static const struct sh_pfc_pin_group pinmux_groups[] = {
SH_PFC_PIN_GROUP(pwm5_b),
SH_PFC_PIN_GROUP(pwm6_a),
SH_PFC_PIN_GROUP(pwm6_b),
SH_PFC_PIN_GROUP(sata0_devslp_a),
SH_PFC_PIN_GROUP(sata0_devslp_b),
SH_PFC_PIN_GROUP(scif0_data),
SH_PFC_PIN_GROUP(scif0_clk),
SH_PFC_PIN_GROUP(scif0_ctrl),
@ -3877,6 +3898,11 @@ static const char * const pwm6_groups[] = {
"pwm6_b",
};
static const char * const sata0_groups[] = {
"sata0_devslp_a",
"sata0_devslp_b",
};
static const char * const scif0_groups[] = {
"scif0_data",
"scif0_clk",
@ -3999,6 +4025,7 @@ static const struct sh_pfc_function pinmux_functions[] = {
SH_PFC_FUNCTION(pwm4),
SH_PFC_FUNCTION(pwm5),
SH_PFC_FUNCTION(pwm6),
SH_PFC_FUNCTION(sata0),
SH_PFC_FUNCTION(scif0),
SH_PFC_FUNCTION(scif1),
SH_PFC_FUNCTION(scif2),