fbdev: bfin_adv7393fb: new Blackfin ADV7393 driver
Driver for ADV7393 add-on card for multiple Blackfin boards. Signed-off-by: Michael Hennerich <michael.hennerich@analog.com> Signed-off-by: Bryan Wu <cooloney@kernel.org> Signed-off-by: Mike Frysinger <vapier@gentoo.org> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
This commit is contained in:
Michael Hennerich
Paul Mundt
parent
dbcc465a3c
commit
cffd9348a3
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@ -657,6 +657,58 @@ config FB_BF537_LQ035
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To compile this driver as a module, choose M here: the
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module will be called bf537-lq035.
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config FB_BFIN_7393
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tristate "Blackfin ADV7393 Video encoder"
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depends on FB && BLACKFIN
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select I2C
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select FB_CFB_FILLRECT
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select FB_CFB_COPYAREA
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select FB_CFB_IMAGEBLIT
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help
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This is the framebuffer device for a ADV7393 video encoder
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attached to a Blackfin on the PPI port.
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If your Blackfin board has a ADV7393 select Y.
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To compile this driver as a module, choose M here: the
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module will be called bfin_adv7393fb.
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choice
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prompt "Video mode support"
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depends on FB_BFIN_7393
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default NTSC
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config NTSC
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bool 'NTSC 720x480'
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config PAL
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bool 'PAL 720x576'
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config NTSC_640x480
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bool 'NTSC 640x480 (Experimental)'
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config PAL_640x480
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bool 'PAL 640x480 (Experimental)'
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config NTSC_YCBCR
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bool 'NTSC 720x480 YCbCR input'
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config PAL_YCBCR
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bool 'PAL 720x576 YCbCR input'
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endchoice
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choice
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prompt "Size of ADV7393 frame buffer memory Single/Double Size"
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depends on (FB_BFIN_7393)
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default ADV7393_1XMEM
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config ADV7393_1XMEM
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bool 'Single'
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config ADV7393_2XMEM
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bool 'Double'
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endchoice
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config FB_STI
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tristate "HP STI frame buffer device support"
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depends on FB && PARISC
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@ -148,6 +148,7 @@ obj-$(CONFIG_FB_BF537_LQ035) += bf537-lq035.o
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obj-$(CONFIG_FB_BF54X_LQ043) += bf54x-lq043fb.o
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obj-$(CONFIG_FB_BFIN_LQ035Q1) += bfin-lq035q1-fb.o
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obj-$(CONFIG_FB_BFIN_T350MCQB) += bfin-t350mcqb-fb.o
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obj-$(CONFIG_FB_BFIN_7393) += bfin_adv7393fb.o
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obj-$(CONFIG_FB_MX3) += mx3fb.o
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obj-$(CONFIG_FB_DA8XX) += da8xx-fb.o
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@ -0,0 +1,832 @@
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/*
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* Frame buffer driver for ADV7393/2 video encoder
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*
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* Copyright 2006-2009 Analog Devices Inc.
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* Licensed under the GPL-2 or late.
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*/
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/*
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* TODO: Remove Globals
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* TODO: Code Cleanup
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*/
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#define pr_fmt(fmt) DRIVER_NAME ": " fmt
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#include <linux/module.h>
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#include <linux/kernel.h>
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#include <linux/errno.h>
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#include <linux/string.h>
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#include <linux/mm.h>
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#include <linux/tty.h>
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#include <linux/slab.h>
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#include <linux/delay.h>
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#include <linux/fb.h>
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#include <linux/ioport.h>
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#include <linux/init.h>
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#include <linux/types.h>
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#include <linux/interrupt.h>
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#include <linux/sched.h>
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#include <asm/blackfin.h>
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#include <asm/irq.h>
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#include <asm/dma.h>
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#include <linux/uaccess.h>
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#include <linux/gpio.h>
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#include <asm/portmux.h>
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#include <linux/dma-mapping.h>
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#include <linux/proc_fs.h>
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#include <linux/platform_device.h>
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#include <linux/i2c.h>
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#include <linux/i2c-dev.h>
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#include "bfin_adv7393fb.h"
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static int mode = VMODE;
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static int mem = VMEM;
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static int nocursor = 1;
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static const unsigned short ppi_pins[] = {
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P_PPI0_CLK, P_PPI0_FS1, P_PPI0_FS2,
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P_PPI0_D0, P_PPI0_D1, P_PPI0_D2, P_PPI0_D3,
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P_PPI0_D4, P_PPI0_D5, P_PPI0_D6, P_PPI0_D7,
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P_PPI0_D8, P_PPI0_D9, P_PPI0_D10, P_PPI0_D11,
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P_PPI0_D12, P_PPI0_D13, P_PPI0_D14, P_PPI0_D15,
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0
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};
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/*
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* card parameters
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*/
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static struct bfin_adv7393_fb_par {
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/* structure holding blackfin / adv7393 paramters when
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screen is blanked */
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struct {
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u8 Mode; /* ntsc/pal/? */
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} vga_state;
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atomic_t ref_count;
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} bfin_par;
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/* --------------------------------------------------------------------- */
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static struct fb_var_screeninfo bfin_adv7393_fb_defined = {
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.xres = 720,
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.yres = 480,
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.xres_virtual = 720,
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.yres_virtual = 480,
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.bits_per_pixel = 16,
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.activate = FB_ACTIVATE_TEST,
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.height = -1,
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.width = -1,
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.left_margin = 0,
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.right_margin = 0,
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.upper_margin = 0,
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.lower_margin = 0,
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.vmode = FB_VMODE_INTERLACED,
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.red = {11, 5, 0},
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.green = {5, 6, 0},
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.blue = {0, 5, 0},
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.transp = {0, 0, 0},
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};
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static struct fb_fix_screeninfo bfin_adv7393_fb_fix __devinitdata = {
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.id = "BFIN ADV7393",
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.smem_len = 720 * 480 * 2,
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.type = FB_TYPE_PACKED_PIXELS,
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.visual = FB_VISUAL_TRUECOLOR,
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.xpanstep = 0,
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.ypanstep = 0,
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.line_length = 720 * 2,
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.accel = FB_ACCEL_NONE
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};
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static struct fb_ops bfin_adv7393_fb_ops = {
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.owner = THIS_MODULE,
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.fb_open = bfin_adv7393_fb_open,
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.fb_release = bfin_adv7393_fb_release,
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.fb_check_var = bfin_adv7393_fb_check_var,
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.fb_pan_display = bfin_adv7393_fb_pan_display,
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.fb_blank = bfin_adv7393_fb_blank,
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.fb_fillrect = cfb_fillrect,
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.fb_copyarea = cfb_copyarea,
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.fb_imageblit = cfb_imageblit,
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.fb_cursor = bfin_adv7393_fb_cursor,
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.fb_setcolreg = bfin_adv7393_fb_setcolreg,
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};
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static int dma_desc_list(struct adv7393fb_device *fbdev, u16 arg)
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{
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if (arg == BUILD) { /* Build */
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fbdev->vb1 = l1_data_sram_zalloc(sizeof(struct dmasg));
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if (fbdev->vb1 == NULL)
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goto error;
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fbdev->av1 = l1_data_sram_zalloc(sizeof(struct dmasg));
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if (fbdev->av1 == NULL)
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goto error;
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fbdev->vb2 = l1_data_sram_zalloc(sizeof(struct dmasg));
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if (fbdev->vb2 == NULL)
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goto error;
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fbdev->av2 = l1_data_sram_zalloc(sizeof(struct dmasg));
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if (fbdev->av2 == NULL)
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goto error;
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/* Build linked DMA descriptor list */
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fbdev->vb1->next_desc_addr = fbdev->av1;
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fbdev->av1->next_desc_addr = fbdev->vb2;
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fbdev->vb2->next_desc_addr = fbdev->av2;
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fbdev->av2->next_desc_addr = fbdev->vb1;
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/* Save list head */
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fbdev->descriptor_list_head = fbdev->av2;
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/* Vertical Blanking Field 1 */
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fbdev->vb1->start_addr = VB_DUMMY_MEMORY_SOURCE;
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fbdev->vb1->cfg = DMA_CFG_VAL;
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fbdev->vb1->x_count =
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fbdev->modes[mode].xres + fbdev->modes[mode].boeft_blank;
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fbdev->vb1->x_modify = 0;
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fbdev->vb1->y_count = fbdev->modes[mode].vb1_lines;
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fbdev->vb1->y_modify = 0;
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/* Active Video Field 1 */
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fbdev->av1->start_addr = (unsigned long)fbdev->fb_mem;
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fbdev->av1->cfg = DMA_CFG_VAL;
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fbdev->av1->x_count =
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fbdev->modes[mode].xres + fbdev->modes[mode].boeft_blank;
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fbdev->av1->x_modify = fbdev->modes[mode].bpp / 8;
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fbdev->av1->y_count = fbdev->modes[mode].a_lines;
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fbdev->av1->y_modify =
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(fbdev->modes[mode].xres - fbdev->modes[mode].boeft_blank +
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1) * (fbdev->modes[mode].bpp / 8);
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/* Vertical Blanking Field 2 */
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fbdev->vb2->start_addr = VB_DUMMY_MEMORY_SOURCE;
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fbdev->vb2->cfg = DMA_CFG_VAL;
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fbdev->vb2->x_count =
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fbdev->modes[mode].xres + fbdev->modes[mode].boeft_blank;
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fbdev->vb2->x_modify = 0;
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fbdev->vb2->y_count = fbdev->modes[mode].vb2_lines;
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fbdev->vb2->y_modify = 0;
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/* Active Video Field 2 */
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fbdev->av2->start_addr =
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(unsigned long)fbdev->fb_mem + fbdev->line_len;
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fbdev->av2->cfg = DMA_CFG_VAL;
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fbdev->av2->x_count =
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fbdev->modes[mode].xres + fbdev->modes[mode].boeft_blank;
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fbdev->av2->x_modify = (fbdev->modes[mode].bpp / 8);
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fbdev->av2->y_count = fbdev->modes[mode].a_lines;
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fbdev->av2->y_modify =
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(fbdev->modes[mode].xres - fbdev->modes[mode].boeft_blank +
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1) * (fbdev->modes[mode].bpp / 8);
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return 1;
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}
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error:
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l1_data_sram_free(fbdev->vb1);
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l1_data_sram_free(fbdev->av1);
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l1_data_sram_free(fbdev->vb2);
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l1_data_sram_free(fbdev->av2);
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return 0;
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}
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static int bfin_config_dma(struct adv7393fb_device *fbdev)
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{
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BUG_ON(!(fbdev->fb_mem));
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set_dma_x_count(CH_PPI, fbdev->descriptor_list_head->x_count);
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set_dma_x_modify(CH_PPI, fbdev->descriptor_list_head->x_modify);
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set_dma_y_count(CH_PPI, fbdev->descriptor_list_head->y_count);
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set_dma_y_modify(CH_PPI, fbdev->descriptor_list_head->y_modify);
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set_dma_start_addr(CH_PPI, fbdev->descriptor_list_head->start_addr);
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set_dma_next_desc_addr(CH_PPI,
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fbdev->descriptor_list_head->next_desc_addr);
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set_dma_config(CH_PPI, fbdev->descriptor_list_head->cfg);
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return 1;
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}
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static void bfin_disable_dma(void)
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{
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bfin_write_DMA0_CONFIG(bfin_read_DMA0_CONFIG() & ~DMAEN);
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}
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static void bfin_config_ppi(struct adv7393fb_device *fbdev)
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{
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if (ANOMALY_05000183) {
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bfin_write_TIMER2_CONFIG(WDTH_CAP);
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bfin_write_TIMER_ENABLE(TIMEN2);
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}
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bfin_write_PPI_CONTROL(0x381E);
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bfin_write_PPI_FRAME(fbdev->modes[mode].tot_lines);
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bfin_write_PPI_COUNT(fbdev->modes[mode].xres +
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fbdev->modes[mode].boeft_blank - 1);
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bfin_write_PPI_DELAY(fbdev->modes[mode].aoeft_blank - 1);
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}
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static void bfin_enable_ppi(void)
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{
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bfin_write_PPI_CONTROL(bfin_read_PPI_CONTROL() | PORT_EN);
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}
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static void bfin_disable_ppi(void)
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{
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bfin_write_PPI_CONTROL(bfin_read_PPI_CONTROL() & ~PORT_EN);
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}
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static inline int adv7393_write(struct i2c_client *client, u8 reg, u8 value)
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{
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return i2c_smbus_write_byte_data(client, reg, value);
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}
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static inline int adv7393_read(struct i2c_client *client, u8 reg)
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{
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return i2c_smbus_read_byte_data(client, reg);
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}
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static int
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adv7393_write_block(struct i2c_client *client,
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const u8 *data, unsigned int len)
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{
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int ret = -1;
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u8 reg;
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while (len >= 2) {
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reg = *data++;
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ret = adv7393_write(client, reg, *data++);
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if (ret < 0)
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break;
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len -= 2;
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}
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return ret;
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}
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static int adv7393_mode(struct i2c_client *client, u16 mode)
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{
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switch (mode) {
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case POWER_ON: /* ADV7393 Sleep mode OFF */
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adv7393_write(client, 0x00, 0x1E);
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break;
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case POWER_DOWN: /* ADV7393 Sleep mode ON */
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adv7393_write(client, 0x00, 0x1F);
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break;
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case BLANK_OFF: /* Pixel Data Valid */
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adv7393_write(client, 0x82, 0xCB);
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break;
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case BLANK_ON: /* Pixel Data Invalid */
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adv7393_write(client, 0x82, 0x8B);
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break;
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default:
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return -EINVAL;
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break;
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}
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return 0;
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}
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static irqreturn_t ppi_irq_error(int irq, void *dev_id)
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{
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struct adv7393fb_device *fbdev = (struct adv7393fb_device *)dev_id;
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u16 status = bfin_read_PPI_STATUS();
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pr_debug("%s: PPI Status = 0x%X\n", __func__, status);
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if (status) {
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bfin_disable_dma(); /* TODO: Check Sequence */
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bfin_disable_ppi();
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bfin_clear_PPI_STATUS();
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bfin_config_dma(fbdev);
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bfin_enable_ppi();
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}
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return IRQ_HANDLED;
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}
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static int proc_output(char *buf)
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{
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char *p = buf;
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p += sprintf(p,
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"Usage:\n"
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"echo 0x[REG][Value] > adv7393\n"
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"example: echo 0x1234 >adv7393\n"
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"writes 0x34 into Register 0x12\n");
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return p - buf;
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}
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static int
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adv7393_read_proc(char *page, char **start, off_t off,
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int count, int *eof, void *data)
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{
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int len;
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len = proc_output(page);
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if (len <= off + count)
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*eof = 1;
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*start = page + off;
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len -= off;
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if (len > count)
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len = count;
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if (len < 0)
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len = 0;
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return len;
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}
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static int
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adv7393_write_proc(struct file *file, const char __user * buffer,
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unsigned long count, void *data)
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{
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struct adv7393fb_device *fbdev = data;
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char line[8];
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unsigned int val;
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int ret;
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ret = copy_from_user(line, buffer, count);
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if (ret)
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return -EFAULT;
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val = simple_strtoul(line, NULL, 0);
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adv7393_write(fbdev->client, val >> 8, val & 0xff);
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return count;
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}
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static int __devinit bfin_adv7393_fb_probe(struct i2c_client *client,
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const struct i2c_device_id *id)
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{
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int ret = 0;
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struct proc_dir_entry *entry;
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int num_modes = ARRAY_SIZE(known_modes);
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struct adv7393fb_device *fbdev = NULL;
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if (mem > 2) {
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dev_err(&client->dev, "mem out of allowed range [1;2]\n");
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return -EINVAL;
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}
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if (mode > num_modes) {
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dev_err(&client->dev, "mode %d: not supported", mode);
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return -EFAULT;
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}
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fbdev = kzalloc(sizeof(*fbdev), GFP_KERNEL);
|
||||
if (!fbdev) {
|
||||
dev_err(&client->dev, "failed to allocate device private record");
|
||||
return -ENOMEM;
|
||||
}
|
||||
|
||||
i2c_set_clientdata(client, fbdev);
|
||||
|
||||
fbdev->modes = known_modes;
|
||||
fbdev->client = client;
|
||||
|
||||
fbdev->fb_len =
|
||||
mem * fbdev->modes[mode].xres * fbdev->modes[mode].xres *
|
||||
(fbdev->modes[mode].bpp / 8);
|
||||
|
||||
fbdev->line_len =
|
||||
fbdev->modes[mode].xres * (fbdev->modes[mode].bpp / 8);
|
||||
|
||||
/* Workaround "PPI Does Not Start Properly In Specific Mode" */
|
||||
if (ANOMALY_05000400) {
|
||||
if (gpio_request(P_IDENT(P_PPI0_FS3), "PPI0_FS3")) {
|
||||
dev_err(&client->dev, "PPI0_FS3 GPIO request failed\n");
|
||||
ret = -EBUSY;
|
||||
goto out_8;
|
||||
}
|
||||
gpio_direction_output(P_IDENT(P_PPI0_FS3), 0);
|
||||
}
|
||||
|
||||
if (peripheral_request_list(ppi_pins, DRIVER_NAME)) {
|
||||
dev_err(&client->dev, "requesting PPI peripheral failed\n");
|
||||
ret = -EFAULT;
|
||||
goto out_8;
|
||||
}
|
||||
|
||||
fbdev->fb_mem =
|
||||
dma_alloc_coherent(NULL, fbdev->fb_len, &fbdev->dma_handle,
|
||||
GFP_KERNEL);
|
||||
|
||||
if (NULL == fbdev->fb_mem) {
|
||||
dev_err(&client->dev, "couldn't allocate dma buffer (%d bytes)\n",
|
||||
(u32) fbdev->fb_len);
|
||||
ret = -ENOMEM;
|
||||
goto out_7;
|
||||
}
|
||||
|
||||
fbdev->info.screen_base = (void *)fbdev->fb_mem;
|
||||
bfin_adv7393_fb_fix.smem_start = (int)fbdev->fb_mem;
|
||||
|
||||
bfin_adv7393_fb_fix.smem_len = fbdev->fb_len;
|
||||
bfin_adv7393_fb_fix.line_length = fbdev->line_len;
|
||||
|
||||
if (mem > 1)
|
||||
bfin_adv7393_fb_fix.ypanstep = 1;
|
||||
|
||||
bfin_adv7393_fb_defined.red.length = 5;
|
||||
bfin_adv7393_fb_defined.green.length = 6;
|
||||
bfin_adv7393_fb_defined.blue.length = 5;
|
||||
|
||||
bfin_adv7393_fb_defined.xres = fbdev->modes[mode].xres;
|
||||
bfin_adv7393_fb_defined.yres = fbdev->modes[mode].yres;
|
||||
bfin_adv7393_fb_defined.xres_virtual = fbdev->modes[mode].xres;
|
||||
bfin_adv7393_fb_defined.yres_virtual = mem * fbdev->modes[mode].yres;
|
||||
bfin_adv7393_fb_defined.bits_per_pixel = fbdev->modes[mode].bpp;
|
||||
|
||||
fbdev->info.fbops = &bfin_adv7393_fb_ops;
|
||||
fbdev->info.var = bfin_adv7393_fb_defined;
|
||||
fbdev->info.fix = bfin_adv7393_fb_fix;
|
||||
fbdev->info.par = &bfin_par;
|
||||
fbdev->info.flags = FBINFO_DEFAULT;
|
||||
|
||||
fbdev->info.pseudo_palette = kzalloc(sizeof(u32) * 16, GFP_KERNEL);
|
||||
if (!fbdev->info.pseudo_palette) {
|
||||
dev_err(&client->dev, "failed to allocate pseudo_palette\n");
|
||||
ret = -ENOMEM;
|
||||
goto out_6;
|
||||
}
|
||||
|
||||
if (fb_alloc_cmap(&fbdev->info.cmap, BFIN_LCD_NBR_PALETTE_ENTRIES, 0) < 0) {
|
||||
dev_err(&client->dev, "failed to allocate colormap (%d entries)\n",
|
||||
BFIN_LCD_NBR_PALETTE_ENTRIES);
|
||||
ret = -EFAULT;
|
||||
goto out_5;
|
||||
}
|
||||
|
||||
if (request_dma(CH_PPI, "BF5xx_PPI_DMA") < 0) {
|
||||
dev_err(&client->dev, "unable to request PPI DMA\n");
|
||||
ret = -EFAULT;
|
||||
goto out_4;
|
||||
}
|
||||
|
||||
if (request_irq(IRQ_PPI_ERROR, ppi_irq_error, IRQF_DISABLED,
|
||||
"PPI ERROR", fbdev) < 0) {
|
||||
dev_err(&client->dev, "unable to request PPI ERROR IRQ\n");
|
||||
ret = -EFAULT;
|
||||
goto out_3;
|
||||
}
|
||||
|
||||
fbdev->open = 0;
|
||||
|
||||
ret = adv7393_write_block(client, fbdev->modes[mode].adv7393_i2c_initd,
|
||||
fbdev->modes[mode].adv7393_i2c_initd_len);
|
||||
|
||||
if (ret) {
|
||||
dev_err(&client->dev, "i2c attach: init error\n");
|
||||
goto out_1;
|
||||
}
|
||||
|
||||
|
||||
if (register_framebuffer(&fbdev->info) < 0) {
|
||||
dev_err(&client->dev, "unable to register framebuffer\n");
|
||||
ret = -EFAULT;
|
||||
goto out_1;
|
||||
}
|
||||
|
||||
dev_info(&client->dev, "fb%d: %s frame buffer device\n",
|
||||
fbdev->info.node, fbdev->info.fix.id);
|
||||
dev_info(&client->dev, "fb memory address : 0x%p\n", fbdev->fb_mem);
|
||||
|
||||
entry = create_proc_entry("driver/adv7393", 0, NULL);
|
||||
if (!entry) {
|
||||
dev_err(&client->dev, "unable to create /proc entry\n");
|
||||
ret = -EFAULT;
|
||||
goto out_0;
|
||||
}
|
||||
|
||||
entry->read_proc = adv7393_read_proc;
|
||||
entry->write_proc = adv7393_write_proc;
|
||||
entry->data = fbdev;
|
||||
|
||||
return 0;
|
||||
|
||||
out_0:
|
||||
unregister_framebuffer(&fbdev->info);
|
||||
out_1:
|
||||
free_irq(IRQ_PPI_ERROR, fbdev);
|
||||
out_3:
|
||||
free_dma(CH_PPI);
|
||||
out_4:
|
||||
dma_free_coherent(NULL, fbdev->fb_len, fbdev->fb_mem,
|
||||
fbdev->dma_handle);
|
||||
out_5:
|
||||
fb_dealloc_cmap(&fbdev->info.cmap);
|
||||
out_6:
|
||||
kfree(fbdev->info.pseudo_palette);
|
||||
out_7:
|
||||
peripheral_free_list(ppi_pins);
|
||||
out_8:
|
||||
kfree(fbdev);
|
||||
|
||||
return ret;
|
||||
}
|
||||
|
||||
static int bfin_adv7393_fb_open(struct fb_info *info, int user)
|
||||
{
|
||||
struct adv7393fb_device *fbdev = to_adv7393fb_device(info);
|
||||
|
||||
fbdev->info.screen_base = (void *)fbdev->fb_mem;
|
||||
if (!fbdev->info.screen_base) {
|
||||
dev_err(&fbdev->client->dev, "unable to map device\n");
|
||||
return -ENOMEM;
|
||||
}
|
||||
|
||||
fbdev->open = 1;
|
||||
dma_desc_list(fbdev, BUILD);
|
||||
adv7393_mode(fbdev->client, BLANK_OFF);
|
||||
bfin_config_ppi(fbdev);
|
||||
bfin_config_dma(fbdev);
|
||||
bfin_enable_ppi();
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int bfin_adv7393_fb_release(struct fb_info *info, int user)
|
||||
{
|
||||
struct adv7393fb_device *fbdev = to_adv7393fb_device(info);
|
||||
|
||||
adv7393_mode(fbdev->client, BLANK_ON);
|
||||
bfin_disable_dma();
|
||||
bfin_disable_ppi();
|
||||
dma_desc_list(fbdev, DESTRUCT);
|
||||
fbdev->open = 0;
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int
|
||||
bfin_adv7393_fb_check_var(struct fb_var_screeninfo *var, struct fb_info *info)
|
||||
{
|
||||
|
||||
switch (var->bits_per_pixel) {
|
||||
case 16:/* DIRECTCOLOUR, 64k */
|
||||
var->red.offset = info->var.red.offset;
|
||||
var->green.offset = info->var.green.offset;
|
||||
var->blue.offset = info->var.blue.offset;
|
||||
var->red.length = info->var.red.length;
|
||||
var->green.length = info->var.green.length;
|
||||
var->blue.length = info->var.blue.length;
|
||||
var->transp.offset = 0;
|
||||
var->transp.length = 0;
|
||||
var->transp.msb_right = 0;
|
||||
var->red.msb_right = 0;
|
||||
var->green.msb_right = 0;
|
||||
var->blue.msb_right = 0;
|
||||
break;
|
||||
default:
|
||||
pr_debug("%s: depth not supported: %u BPP\n", __func__,
|
||||
var->bits_per_pixel);
|
||||
return -EINVAL;
|
||||
}
|
||||
|
||||
if (info->var.xres != var->xres ||
|
||||
info->var.yres != var->yres ||
|
||||
info->var.xres_virtual != var->xres_virtual ||
|
||||
info->var.yres_virtual != var->yres_virtual) {
|
||||
pr_debug("%s: Resolution not supported: X%u x Y%u\n",
|
||||
__func__, var->xres, var->yres);
|
||||
return -EINVAL;
|
||||
}
|
||||
|
||||
/*
|
||||
* Memory limit
|
||||
*/
|
||||
|
||||
if ((info->fix.line_length * var->yres_virtual) > info->fix.smem_len) {
|
||||
pr_debug("%s: Memory Limit requested yres_virtual = %u\n",
|
||||
__func__, var->yres_virtual);
|
||||
return -ENOMEM;
|
||||
}
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int
|
||||
bfin_adv7393_fb_pan_display(struct fb_var_screeninfo *var, struct fb_info *info)
|
||||
{
|
||||
int dy;
|
||||
u32 dmaaddr;
|
||||
struct adv7393fb_device *fbdev = to_adv7393fb_device(info);
|
||||
|
||||
if (!var || !info)
|
||||
return -EINVAL;
|
||||
|
||||
if (var->xoffset - info->var.xoffset) {
|
||||
/* No support for X panning for now! */
|
||||
return -EINVAL;
|
||||
}
|
||||
dy = var->yoffset - info->var.yoffset;
|
||||
|
||||
if (dy) {
|
||||
pr_debug("%s: Panning screen of %d lines\n", __func__, dy);
|
||||
|
||||
dmaaddr = fbdev->av1->start_addr;
|
||||
dmaaddr += (info->fix.line_length * dy);
|
||||
/* TODO: Wait for current frame to finished */
|
||||
|
||||
fbdev->av1->start_addr = (unsigned long)dmaaddr;
|
||||
fbdev->av2->start_addr = (unsigned long)dmaaddr + fbdev->line_len;
|
||||
}
|
||||
|
||||
return 0;
|
||||
|
||||
}
|
||||
|
||||
/* 0 unblank, 1 blank, 2 no vsync, 3 no hsync, 4 off */
|
||||
static int bfin_adv7393_fb_blank(int blank, struct fb_info *info)
|
||||
{
|
||||
struct adv7393fb_device *fbdev = to_adv7393fb_device(info);
|
||||
|
||||
switch (blank) {
|
||||
|
||||
case VESA_NO_BLANKING:
|
||||
/* Turn on panel */
|
||||
adv7393_mode(fbdev->client, BLANK_OFF);
|
||||
break;
|
||||
|
||||
case VESA_VSYNC_SUSPEND:
|
||||
case VESA_HSYNC_SUSPEND:
|
||||
case VESA_POWERDOWN:
|
||||
/* Turn off panel */
|
||||
adv7393_mode(fbdev->client, BLANK_ON);
|
||||
break;
|
||||
|
||||
default:
|
||||
return -EINVAL;
|
||||
break;
|
||||
}
|
||||
return 0;
|
||||
}
|
||||
|
||||
int bfin_adv7393_fb_cursor(struct fb_info *info, struct fb_cursor *cursor)
|
||||
{
|
||||
if (nocursor)
|
||||
return 0;
|
||||
else
|
||||
return -EINVAL; /* just to force soft_cursor() call */
|
||||
}
|
||||
|
||||
static int bfin_adv7393_fb_setcolreg(u_int regno, u_int red, u_int green,
|
||||
u_int blue, u_int transp,
|
||||
struct fb_info *info)
|
||||
{
|
||||
if (regno >= BFIN_LCD_NBR_PALETTE_ENTRIES)
|
||||
return -EINVAL;
|
||||
|
||||
if (info->var.grayscale)
|
||||
/* grayscale = 0.30*R + 0.59*G + 0.11*B */
|
||||
red = green = blue = (red * 77 + green * 151 + blue * 28) >> 8;
|
||||
|
||||
if (info->fix.visual == FB_VISUAL_TRUECOLOR) {
|
||||
u32 value;
|
||||
/* Place color in the pseudopalette */
|
||||
if (regno > 16)
|
||||
return -EINVAL;
|
||||
|
||||
red >>= (16 - info->var.red.length);
|
||||
green >>= (16 - info->var.green.length);
|
||||
blue >>= (16 - info->var.blue.length);
|
||||
|
||||
value = (red << info->var.red.offset) |
|
||||
(green << info->var.green.offset)|
|
||||
(blue << info->var.blue.offset);
|
||||
value &= 0xFFFF;
|
||||
|
||||
((u32 *) (info->pseudo_palette))[regno] = value;
|
||||
}
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int __devexit bfin_adv7393_fb_remove(struct i2c_client *client)
|
||||
{
|
||||
struct adv7393fb_device *fbdev = i2c_get_clientdata(client);
|
||||
|
||||
adv7393_mode(client, POWER_DOWN);
|
||||
|
||||
if (fbdev->fb_mem)
|
||||
dma_free_coherent(NULL, fbdev->fb_len, fbdev->fb_mem, fbdev->dma_handle);
|
||||
free_dma(CH_PPI);
|
||||
free_irq(IRQ_PPI_ERROR, fbdev);
|
||||
unregister_framebuffer(&fbdev->info);
|
||||
remove_proc_entry("driver/adv7393", NULL);
|
||||
fb_dealloc_cmap(&fbdev->info.cmap);
|
||||
kfree(fbdev->info.pseudo_palette);
|
||||
|
||||
if (ANOMALY_05000400)
|
||||
gpio_free(P_IDENT(P_PPI0_FS3)); /* FS3 */
|
||||
peripheral_free_list(ppi_pins);
|
||||
kfree(fbdev);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
#ifdef CONFIG_PM
|
||||
static int bfin_adv7393_fb_suspend(struct device *dev)
|
||||
{
|
||||
struct adv7393fb_device *fbdev = dev_get_drvdata(dev);
|
||||
|
||||
if (fbdev->open) {
|
||||
bfin_disable_dma();
|
||||
bfin_disable_ppi();
|
||||
dma_desc_list(fbdev, DESTRUCT);
|
||||
}
|
||||
adv7393_mode(fbdev->client, POWER_DOWN);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int bfin_adv7393_fb_resume(struct device *dev)
|
||||
{
|
||||
struct adv7393fb_device *fbdev = dev_get_drvdata(dev);
|
||||
|
||||
adv7393_mode(fbdev->client, POWER_ON);
|
||||
|
||||
if (fbdev->open) {
|
||||
dma_desc_list(fbdev, BUILD);
|
||||
bfin_config_ppi(fbdev);
|
||||
bfin_config_dma(fbdev);
|
||||
bfin_enable_ppi();
|
||||
}
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static const struct dev_pm_ops bfin_adv7393_dev_pm_ops = {
|
||||
.suspend = bfin_adv7393_fb_suspend,
|
||||
.resume = bfin_adv7393_fb_resume,
|
||||
};
|
||||
#endif
|
||||
|
||||
static const struct i2c_device_id bfin_adv7393_id[] = {
|
||||
{DRIVER_NAME, 0},
|
||||
{}
|
||||
};
|
||||
|
||||
MODULE_DEVICE_TABLE(i2c, bfin_adv7393_id);
|
||||
|
||||
static struct i2c_driver bfin_adv7393_fb_driver = {
|
||||
.driver = {
|
||||
.name = DRIVER_NAME,
|
||||
#ifdef CONFIG_PM
|
||||
.pm = &bfin_adv7393_dev_pm_ops,
|
||||
#endif
|
||||
},
|
||||
.probe = bfin_adv7393_fb_probe,
|
||||
.remove = __devexit_p(bfin_adv7393_fb_remove),
|
||||
.id_table = bfin_adv7393_id,
|
||||
};
|
||||
|
||||
static int __init bfin_adv7393_fb_driver_init(void)
|
||||
{
|
||||
#if defined(CONFIG_I2C_BLACKFIN_TWI) || defined(CONFIG_I2C_BLACKFIN_TWI_MODULE)
|
||||
request_module("i2c-bfin-twi");
|
||||
#else
|
||||
request_module("i2c-gpio");
|
||||
#endif
|
||||
|
||||
return i2c_add_driver(&bfin_adv7393_fb_driver);
|
||||
}
|
||||
module_init(bfin_adv7393_fb_driver_init);
|
||||
|
||||
static void __exit bfin_adv7393_fb_driver_cleanup(void)
|
||||
{
|
||||
i2c_del_driver(&bfin_adv7393_fb_driver);
|
||||
}
|
||||
module_exit(bfin_adv7393_fb_driver_cleanup);
|
||||
|
||||
MODULE_LICENSE("GPL");
|
||||
MODULE_AUTHOR("Michael Hennerich <hennerich@blackfin.uclinux.org>");
|
||||
MODULE_DESCRIPTION("Frame buffer driver for ADV7393/2 Video Encoder");
|
||||
|
||||
module_param(mode, int, 0);
|
||||
MODULE_PARM_DESC(mode,
|
||||
"Video Mode (0=NTSC,1=PAL,2=NTSC 640x480,3=PAL 640x480,4=NTSC YCbCr input,5=PAL YCbCr input)");
|
||||
|
||||
module_param(mem, int, 0);
|
||||
MODULE_PARM_DESC(mem,
|
||||
"Size of frame buffer memory 1=Single 2=Double Size (allows y-panning / frame stacking)");
|
||||
|
||||
module_param(nocursor, int, 0644);
|
||||
MODULE_PARM_DESC(nocursor, "cursor enable/disable");
|
||||
|
|
@ -0,0 +1,321 @@
|
|||
/*
|
||||
* Frame buffer driver for ADV7393/2 video encoder
|
||||
*
|
||||
* Copyright 2006-2009 Analog Devices Inc.
|
||||
* Licensed under the GPL-2 or late.
|
||||
*/
|
||||
|
||||
#ifndef __BFIN_ADV7393FB_H__
|
||||
#define __BFIN_ADV7393FB_H__
|
||||
|
||||
#define BFIN_LCD_NBR_PALETTE_ENTRIES 256
|
||||
|
||||
#ifdef CONFIG_NTSC
|
||||
# define VMODE 0
|
||||
#endif
|
||||
#ifdef CONFIG_PAL
|
||||
# define VMODE 1
|
||||
#endif
|
||||
#ifdef CONFIG_NTSC_640x480
|
||||
# define VMODE 2
|
||||
#endif
|
||||
#ifdef CONFIG_PAL_640x480
|
||||
# define VMODE 3
|
||||
#endif
|
||||
#ifdef CONFIG_NTSC_YCBCR
|
||||
# define VMODE 4
|
||||
#endif
|
||||
#ifdef CONFIG_PAL_YCBCR
|
||||
# define VMODE 5
|
||||
#endif
|
||||
|
||||
#ifndef VMODE
|
||||
# define VMODE 1
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_ADV7393_2XMEM
|
||||
# define VMEM 2
|
||||
#else
|
||||
# define VMEM 1
|
||||
#endif
|
||||
|
||||
#if defined(CONFIG_BF537) || defined(CONFIG_BF536) || defined(CONFIG_BF534)
|
||||
# define DMA_CFG_VAL 0x7935 /* Set Sync Bit */
|
||||
# define VB_DUMMY_MEMORY_SOURCE L1_DATA_B_START
|
||||
#else
|
||||
# define DMA_CFG_VAL 0x7915
|
||||
# define VB_DUMMY_MEMORY_SOURCE BOOT_ROM_START
|
||||
#endif
|
||||
|
||||
enum {
|
||||
DESTRUCT,
|
||||
BUILD,
|
||||
};
|
||||
|
||||
enum {
|
||||
POWER_ON,
|
||||
POWER_DOWN,
|
||||
BLANK_ON,
|
||||
BLANK_OFF,
|
||||
};
|
||||
|
||||
#define DRIVER_NAME "bfin-adv7393"
|
||||
|
||||
struct adv7393fb_modes {
|
||||
const s8 name[25]; /* Full name */
|
||||
u16 xres; /* Active Horizonzal Pixels */
|
||||
u16 yres; /* Active Vertical Pixels */
|
||||
u16 bpp;
|
||||
u16 vmode;
|
||||
u16 a_lines; /* Active Lines per Field */
|
||||
u16 vb1_lines; /* Vertical Blanking Field 1 Lines */
|
||||
u16 vb2_lines; /* Vertical Blanking Field 2 Lines */
|
||||
u16 tot_lines; /* Total Lines per Frame */
|
||||
u16 boeft_blank; /* Before Odd/Even Field Transition No. of Blank Pixels */
|
||||
u16 aoeft_blank; /* After Odd/Even Field Transition No. of Blank Pixels */
|
||||
const s8 *adv7393_i2c_initd;
|
||||
u16 adv7393_i2c_initd_len;
|
||||
};
|
||||
|
||||
static const u8 init_NTSC_TESTPATTERN[] = {
|
||||
0x00, 0x1E, /* Power up all DACs and PLL */
|
||||
0x01, 0x00, /* SD-Only Mode */
|
||||
0x80, 0x10, /* SSAF Luma Filter Enabled, NTSC Mode */
|
||||
0x82, 0xCB, /* Step control on, pixel data valid, pedestal on, PrPb SSAF on, CVBS/YC output */
|
||||
0x84, 0x40, /* SD Color Bar Test Pattern Enabled, DAC 2 = Luma, DAC 3 = Chroma */
|
||||
};
|
||||
|
||||
static const u8 init_NTSC[] = {
|
||||
0x00, 0x1E, /* Power up all DACs and PLL */
|
||||
0xC3, 0x26, /* Program RGB->YCrCb Color Space convertion matrix */
|
||||
0xC5, 0x12, /* Program RGB->YCrCb Color Space convertion matrix */
|
||||
0xC2, 0x4A, /* Program RGB->YCrCb Color Space convertion matrix */
|
||||
0xC6, 0x5E, /* Program RGB->YCrCb Color Space convertion matrix */
|
||||
0xBD, 0x19, /* Program RGB->YCrCb Color Space convertion matrix */
|
||||
0xBF, 0x42, /* Program RGB->YCrCb Color Space convertion matrix */
|
||||
0x8C, 0x1F, /* NTSC Subcarrier Frequency */
|
||||
0x8D, 0x7C, /* NTSC Subcarrier Frequency */
|
||||
0x8E, 0xF0, /* NTSC Subcarrier Frequency */
|
||||
0x8F, 0x21, /* NTSC Subcarrier Frequency */
|
||||
0x01, 0x00, /* SD-Only Mode */
|
||||
0x80, 0x30, /* SSAF Luma Filter Enabled, NTSC Mode */
|
||||
0x82, 0x8B, /* Step control on, pixel data invalid, pedestal on, PrPb SSAF on, CVBS/YC output */
|
||||
0x87, 0x80, /* SD Color Bar Test Pattern Enabled, DAC 2 = Luma, DAC 3 = Chroma */
|
||||
0x86, 0x82,
|
||||
0x8B, 0x11,
|
||||
0x88, 0x20,
|
||||
0x8A, 0x0d,
|
||||
};
|
||||
|
||||
static const u8 init_PAL[] = {
|
||||
0x00, 0x1E, /* Power up all DACs and PLL */
|
||||
0xC3, 0x26, /* Program RGB->YCrCb Color Space convertion matrix */
|
||||
0xC5, 0x12, /* Program RGB->YCrCb Color Space convertion matrix */
|
||||
0xC2, 0x4A, /* Program RGB->YCrCb Color Space convertion matrix */
|
||||
0xC6, 0x5E, /* Program RGB->YCrCb Color Space convertion matrix */
|
||||
0xBD, 0x19, /* Program RGB->YCrCb Color Space convertion matrix */
|
||||
0xBF, 0x42, /* Program RGB->YCrCb Color Space convertion matrix */
|
||||
0x8C, 0xCB, /* PAL Subcarrier Frequency */
|
||||
0x8D, 0x8A, /* PAL Subcarrier Frequency */
|
||||
0x8E, 0x09, /* PAL Subcarrier Frequency */
|
||||
0x8F, 0x2A, /* PAL Subcarrier Frequency */
|
||||
0x01, 0x00, /* SD-Only Mode */
|
||||
0x80, 0x11, /* SSAF Luma Filter Enabled, PAL Mode */
|
||||
0x82, 0x8B, /* Step control on, pixel data invalid, pedestal on, PrPb SSAF on, CVBS/YC output */
|
||||
0x87, 0x80, /* SD Color Bar Test Pattern Enabled, DAC 2 = Luma, DAC 3 = Chroma */
|
||||
0x86, 0x82,
|
||||
0x8B, 0x11,
|
||||
0x88, 0x20,
|
||||
0x8A, 0x0d,
|
||||
};
|
||||
|
||||
static const u8 init_NTSC_YCbCr[] = {
|
||||
0x00, 0x1E, /* Power up all DACs and PLL */
|
||||
0x8C, 0x1F, /* NTSC Subcarrier Frequency */
|
||||
0x8D, 0x7C, /* NTSC Subcarrier Frequency */
|
||||
0x8E, 0xF0, /* NTSC Subcarrier Frequency */
|
||||
0x8F, 0x21, /* NTSC Subcarrier Frequency */
|
||||
0x01, 0x00, /* SD-Only Mode */
|
||||
0x80, 0x30, /* SSAF Luma Filter Enabled, NTSC Mode */
|
||||
0x82, 0x8B, /* Step control on, pixel data invalid, pedestal on, PrPb SSAF on, CVBS/YC output */
|
||||
0x87, 0x00, /* DAC 2 = Luma, DAC 3 = Chroma */
|
||||
0x86, 0x82,
|
||||
0x8B, 0x11,
|
||||
0x88, 0x08,
|
||||
0x8A, 0x0d,
|
||||
};
|
||||
|
||||
static const u8 init_PAL_YCbCr[] = {
|
||||
0x00, 0x1E, /* Power up all DACs and PLL */
|
||||
0x8C, 0xCB, /* PAL Subcarrier Frequency */
|
||||
0x8D, 0x8A, /* PAL Subcarrier Frequency */
|
||||
0x8E, 0x09, /* PAL Subcarrier Frequency */
|
||||
0x8F, 0x2A, /* PAL Subcarrier Frequency */
|
||||
0x01, 0x00, /* SD-Only Mode */
|
||||
0x80, 0x11, /* SSAF Luma Filter Enabled, PAL Mode */
|
||||
0x82, 0x8B, /* Step control on, pixel data invalid, pedestal on, PrPb SSAF on, CVBS/YC output */
|
||||
0x87, 0x00, /* DAC 2 = Luma, DAC 3 = Chroma */
|
||||
0x86, 0x82,
|
||||
0x8B, 0x11,
|
||||
0x88, 0x08,
|
||||
0x8A, 0x0d,
|
||||
};
|
||||
|
||||
static struct adv7393fb_modes known_modes[] = {
|
||||
/* NTSC 720x480 CRT */
|
||||
{
|
||||
.name = "NTSC 720x480",
|
||||
.xres = 720,
|
||||
.yres = 480,
|
||||
.bpp = 16,
|
||||
.vmode = FB_VMODE_INTERLACED,
|
||||
.a_lines = 240,
|
||||
.vb1_lines = 22,
|
||||
.vb2_lines = 23,
|
||||
.tot_lines = 525,
|
||||
.boeft_blank = 16,
|
||||
.aoeft_blank = 122,
|
||||
.adv7393_i2c_initd = init_NTSC,
|
||||
.adv7393_i2c_initd_len = sizeof(init_NTSC)
|
||||
},
|
||||
/* PAL 720x480 CRT */
|
||||
{
|
||||
.name = "PAL 720x576",
|
||||
.xres = 720,
|
||||
.yres = 576,
|
||||
.bpp = 16,
|
||||
.vmode = FB_VMODE_INTERLACED,
|
||||
.a_lines = 288,
|
||||
.vb1_lines = 24,
|
||||
.vb2_lines = 25,
|
||||
.tot_lines = 625,
|
||||
.boeft_blank = 12,
|
||||
.aoeft_blank = 132,
|
||||
.adv7393_i2c_initd = init_PAL,
|
||||
.adv7393_i2c_initd_len = sizeof(init_PAL)
|
||||
},
|
||||
/* NTSC 640x480 CRT Experimental */
|
||||
{
|
||||
.name = "NTSC 640x480",
|
||||
.xres = 640,
|
||||
.yres = 480,
|
||||
.bpp = 16,
|
||||
.vmode = FB_VMODE_INTERLACED,
|
||||
.a_lines = 240,
|
||||
.vb1_lines = 22,
|
||||
.vb2_lines = 23,
|
||||
.tot_lines = 525,
|
||||
.boeft_blank = 16 + 40,
|
||||
.aoeft_blank = 122 + 40,
|
||||
.adv7393_i2c_initd = init_NTSC,
|
||||
.adv7393_i2c_initd_len = sizeof(init_NTSC)
|
||||
},
|
||||
/* PAL 640x480 CRT Experimental */
|
||||
{
|
||||
.name = "PAL 640x480",
|
||||
.xres = 640,
|
||||
.yres = 480,
|
||||
.bpp = 16,
|
||||
.vmode = FB_VMODE_INTERLACED,
|
||||
.a_lines = 288 - 20,
|
||||
.vb1_lines = 24 + 20,
|
||||
.vb2_lines = 25 + 20,
|
||||
.tot_lines = 625,
|
||||
.boeft_blank = 12 + 40,
|
||||
.aoeft_blank = 132 + 40,
|
||||
.adv7393_i2c_initd = init_PAL,
|
||||
.adv7393_i2c_initd_len = sizeof(init_PAL)
|
||||
},
|
||||
/* NTSC 720x480 YCbCR */
|
||||
{
|
||||
.name = "NTSC 720x480 YCbCR",
|
||||
.xres = 720,
|
||||
.yres = 480,
|
||||
.bpp = 16,
|
||||
.vmode = FB_VMODE_INTERLACED,
|
||||
.a_lines = 240,
|
||||
.vb1_lines = 22,
|
||||
.vb2_lines = 23,
|
||||
.tot_lines = 525,
|
||||
.boeft_blank = 16,
|
||||
.aoeft_blank = 122,
|
||||
.adv7393_i2c_initd = init_NTSC_YCbCr,
|
||||
.adv7393_i2c_initd_len = sizeof(init_NTSC_YCbCr)
|
||||
},
|
||||
/* PAL 720x480 CRT */
|
||||
{
|
||||
.name = "PAL 720x576 YCbCR",
|
||||
.xres = 720,
|
||||
.yres = 576,
|
||||
.bpp = 16,
|
||||
.vmode = FB_VMODE_INTERLACED,
|
||||
.a_lines = 288,
|
||||
.vb1_lines = 24,
|
||||
.vb2_lines = 25,
|
||||
.tot_lines = 625,
|
||||
.boeft_blank = 12,
|
||||
.aoeft_blank = 132,
|
||||
.adv7393_i2c_initd = init_PAL_YCbCr,
|
||||
.adv7393_i2c_initd_len = sizeof(init_PAL_YCbCr)
|
||||
}
|
||||
};
|
||||
|
||||
struct adv7393fb_regs {
|
||||
|
||||
};
|
||||
|
||||
struct adv7393fb_device {
|
||||
struct fb_info info; /* FB driver info record */
|
||||
|
||||
struct i2c_client *client;
|
||||
|
||||
struct dmasg *descriptor_list_head;
|
||||
struct dmasg *vb1;
|
||||
struct dmasg *av1;
|
||||
struct dmasg *vb2;
|
||||
struct dmasg *av2;
|
||||
|
||||
dma_addr_t dma_handle;
|
||||
|
||||
struct fb_info bfin_adv7393_fb;
|
||||
|
||||
struct adv7393fb_modes *modes;
|
||||
|
||||
struct adv7393fb_regs *regs; /* Registers memory map */
|
||||
size_t regs_len;
|
||||
size_t fb_len;
|
||||
size_t line_len;
|
||||
u16 open;
|
||||
u16 *fb_mem; /* RGB Buffer */
|
||||
|
||||
};
|
||||
|
||||
#define to_adv7393fb_device(_info) \
|
||||
(_info ? container_of(_info, struct adv7393fb_device, info) : NULL);
|
||||
|
||||
static int bfin_adv7393_fb_open(struct fb_info *info, int user);
|
||||
static int bfin_adv7393_fb_release(struct fb_info *info, int user);
|
||||
static int bfin_adv7393_fb_check_var(struct fb_var_screeninfo *var,
|
||||
struct fb_info *info);
|
||||
|
||||
static int bfin_adv7393_fb_pan_display(struct fb_var_screeninfo *var,
|
||||
struct fb_info *info);
|
||||
|
||||
static int bfin_adv7393_fb_blank(int blank, struct fb_info *info);
|
||||
|
||||
static void bfin_config_ppi(struct adv7393fb_device *fbdev);
|
||||
static int bfin_config_dma(struct adv7393fb_device *fbdev);
|
||||
static void bfin_disable_dma(void);
|
||||
static void bfin_enable_ppi(void);
|
||||
static void bfin_disable_ppi(void);
|
||||
|
||||
static inline int adv7393_write(struct i2c_client *client, u8 reg, u8 value);
|
||||
static inline int adv7393_read(struct i2c_client *client, u8 reg);
|
||||
static int adv7393_write_block(struct i2c_client *client, const u8 *data,
|
||||
unsigned int len);
|
||||
|
||||
int bfin_adv7393_fb_cursor(struct fb_info *info, struct fb_cursor *cursor);
|
||||
static int bfin_adv7393_fb_setcolreg(u_int, u_int, u_int, u_int,
|
||||
u_int, struct fb_info *info);
|
||||
|
||||
#endif
|
||||
Loading…
Reference in New Issue