habanalabs: use PI in MMU cache invalidation
The PS flow for MMU cache invalidation caused timeouts in stress tests. Use PS + PI flow so no timeouts should happen whatsoever. Signed-off-by: Omer Shpigelman <oshpigelman@habana.ai> Reviewed-by: Oded Gabbay <oded.gabbay@gmail.com> Signed-off-by: Oded Gabbay <oded.gabbay@gmail.com>
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@ -2725,6 +2725,12 @@ static int gaudi_mmu_init(struct hl_device *hdev)
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WREG32(mmSTLB_HOP_CONFIGURATION,
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hdev->mmu_huge_page_opt ? 0x30440 : 0x40440);
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/*
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* The H/W expects the first PI after init to be 1. After wraparound
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* we'll write 0.
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*/
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gaudi->mmu_cache_inv_pi = 1;
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gaudi->hw_cap_initialized |= HW_CAP_MMU;
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return 0;
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@ -6017,6 +6023,8 @@ static int gaudi_mmu_invalidate_cache(struct hl_device *hdev, bool is_hard,
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mutex_lock(&hdev->mmu_cache_lock);
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/* L0 & L1 invalidation */
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WREG32(mmSTLB_INV_PS, 3);
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WREG32(mmSTLB_CACHE_INV, gaudi->mmu_cache_inv_pi++);
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WREG32(mmSTLB_INV_PS, 2);
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rc = hl_poll_timeout(
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@ -229,6 +229,8 @@ struct gaudi_internal_qman_info {
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* @multi_msi_mode: whether we are working in multi MSI single MSI mode.
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* Multi MSI is possible only with IOMMU enabled.
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* @ext_queue_idx: helper index for external queues initialization.
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* @mmu_cache_inv_pi: PI for MMU cache invalidation flow. The H/W expects an
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* 8-bit value so use u8.
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*/
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struct gaudi_device {
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int (*armcp_info_get)(struct hl_device *hdev);
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@ -248,6 +250,7 @@ struct gaudi_device {
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u32 hw_cap_initialized;
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u8 multi_msi_mode;
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u8 ext_queue_idx;
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u8 mmu_cache_inv_pi;
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};
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void gaudi_init_security(struct hl_device *hdev);
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