From cfb503a1feab7cd7a4408b5f6d07c1a3edbc8e98 Mon Sep 17 00:00:00 2001 From: Juxin Gao Date: Tue, 28 May 2024 11:33:31 +0800 Subject: [PATCH] irqchip: LoongArch: Fix secondary bridge routing errors upstream: no Fixed the problem of device interrupt exception on lower bridge 1 of 3C5000 dual-bridge platform due to extended IO interrupt routing error. Fixes: da2fb71cdc80 ("irqchip/loongson-pch-pic: Update interrupt registration policy") Signed-off-by: Juxin Gao Signed-off-by: Ming Wang --- drivers/irqchip/irq-loongson-pch-pic.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/irqchip/irq-loongson-pch-pic.c b/drivers/irqchip/irq-loongson-pch-pic.c index b835fd3267c3..287d1f87e09e 100644 --- a/drivers/irqchip/irq-loongson-pch-pic.c +++ b/drivers/irqchip/irq-loongson-pch-pic.c @@ -268,7 +268,7 @@ static void pch_pic_reset(struct pch_pic *priv) for (i = 0; i < PIC_COUNT; i++) { /* Write vector ID */ - writeb(priv->ht_vec_base + i, priv->base + PCH_INT_HTVEC(hwirq_to_bit(priv, i))); + writeb(i, priv->base + PCH_INT_HTVEC(hwirq_to_bit(priv, i))); /* Hardcode route to HT0 Lo */ writeb(1, priv->base + PCH_INT_ROUTE(i)); }