arm64/sysreg: Convert HCRX_EL2 to automatic generation
Convert HCRX_EL2 to be automatically generated as per DDI04187H.a, n functional changes. Signed-off-by: Mark Brown <broonie@kernel.org> Reviewed-by: Kristina Martsenko <kristina.martsenko@arm.com> Link: https://lore.kernel.org/r/20220905225425.1871461-21-broonie@kernel.org Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
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@ -533,7 +533,6 @@
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#define SYS_HFGWTR_EL2 sys_reg(3, 4, 1, 1, 5)
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#define SYS_HFGITR_EL2 sys_reg(3, 4, 1, 1, 6)
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#define SYS_TRFCR_EL2 sys_reg(3, 4, 1, 2, 1)
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#define SYS_HCRX_EL2 sys_reg(3, 4, 1, 2, 2)
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#define SYS_HDFGRTR_EL2 sys_reg(3, 4, 3, 1, 4)
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#define SYS_HDFGWTR_EL2 sys_reg(3, 4, 3, 1, 5)
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#define SYS_HAFGRTR_EL2 sys_reg(3, 4, 3, 1, 6)
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@ -1023,9 +1022,6 @@
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#define TRFCR_ELx_ExTRE BIT(1)
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#define TRFCR_ELx_E0TRE BIT(0)
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/* HCRX_EL2 definitions */
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#define HCRX_EL2_SMPME_MASK (1 << 5)
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/* GIC Hypervisor interface registers */
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/* ICH_MISR_EL2 bit definitions */
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#define ICH_MISR_EOI (1 << 0)
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@ -516,6 +516,22 @@ Sysreg ZCR_EL2 3 4 1 2 0
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Fields ZCR_ELx
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EndSysreg
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Sysreg HCRX_EL2 3 4 1 2 2
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Res0 63:12
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Field 11 MSCEn
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Field 10 MCE2
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Field 9 CMOW
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Field 8 VFNMI
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Field 7 VINMI
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Field 6 TALLINT
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Field 5 SMPME
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Field 4 FGTnXS
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Field 3 FnXS
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Field 2 EnASR
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Field 1 EnALS
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Field 0 EnAS0
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EndSysreg
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Sysreg SMPRIMAP_EL2 3 4 1 2 5
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Field 63:60 P15
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Field 59:56 P14
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