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Second Round of Renesas ARM based SoC Board updates for v3.14 

* r8a7791 (R-Car M2) based Koelsch board
   - Let Koelsch multiplatform boot with Koelsch DTB
   - Remove non-multiplatform DT reference support
   - Instantiate clkdevs for SCIF and CMT
   - Remove duplicate CCF initialization
   - Add Ether and DU support
 
 * r8a7790 (R-Car H2) based Lager board
   - Let Lager multiplatform boot with Lager DTB
   - Remove non-multiplatform DT reference support
   - Instantiate clkdevs for SCIF and CMT
   - Enable multiplaform kernel support
 
 * r8a7740 (R-Mobile A1) based Armadillo board
   - Set backlight enable GPIO
 
 * sh7374 (SH-Mobile AP4) based Mackerel board
   - Correct USBHS pinconf entry
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Merge tag 'renesas-boards2-for-v3.14' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into next/boards

From Simon Horman:
Second Round of Renesas ARM based SoC Board updates for v3.14

* r8a7791 (R-Car M2) based Koelsch board
  - Let Koelsch multiplatform boot with Koelsch DTB
  - Remove non-multiplatform DT reference support
  - Instantiate clkdevs for SCIF and CMT
  - Remove duplicate CCF initialization
  - Add Ether and DU support

* r8a7790 (R-Car H2) based Lager board
  - Let Lager multiplatform boot with Lager DTB
  - Remove non-multiplatform DT reference support
  - Instantiate clkdevs for SCIF and CMT
  - Enable multiplaform kernel support

* r8a7740 (R-Mobile A1) based Armadillo board
  - Set backlight enable GPIO

* sh7374 (SH-Mobile AP4) based Mackerel board
  - Correct USBHS pinconf entry

* tag 'renesas-boards2-for-v3.14' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas: (25 commits)
  ARM: shmobile: mackerel: Fix USBHS pinconf entry
  ARM: shmobile: Let Koelsch multiplatform boot with Koelsch DTB
  ARM: shmobile: Let Lager multiplatform boot with Lager DTB
  ARM: shmobile: Remove non-multiplatform Koelsch reference support
  ARM: shmobile: Remove non-multiplatform Lager reference support
  ARM: shmobile: koelsch-reference: Instantiate clkdevs for SCIF and CMT
  ARM: shmobile: lager-reference: Instantiate clkdevs for SCIF and CMT
  ARM: shmobile: koelsch-reference: Remove duplicate CCF initialization
  ARM: shmobile: lager-reference: Enable multiplaform kernel support
  ARM: shmobile: armadillo: Set backlight enable GPIO
  ARM: shmobile: Koelsch: add Ether support
  ARM: shmobile: koelsch: Add DU device
  arm: shmobile: clks: remove duplicated clock from r7s72100
  ARM: shmobile: koelsch: Conditionally select MICREL_PHY
  ARM: shmobile: rcar-gen2: Initialize CCF before clock sources
  ARM: shmobile: r8a7791: Add clock index macros for DT sources
  ARM: shmobile: r8a7790: Add clock index macros for DT sources
  ARM: shmobile: Add select MIGHT_HAVE_PCI for PCI-AHB bridge code
  ARM: shmobile: r8a7778: add USB Func DMAEngine support
  ARM: rcar-gen2: Do not setup timer in non-secure mode
  ...

Signed-off-by: Olof Johansson <olof@lixom.net>
This commit is contained in:
Olof Johansson 2014-01-02 11:25:10 -08:00
parent 160c39a2d7 b58c8e7b43
commit cf90bb2fe1
20 changed files with 547 additions and 44 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

4
arch/arm/boot/dts/Makefile
View File

@ -233,7 +233,6 @@ dtb-$(CONFIG_ARCH_SHMOBILE_LEGACY) += emev2-kzm9d.dtb \
r8a7779-marzen-reference.dtb \
r8a7791-koelsch.dtb \
r8a7790-lager.dtb \
r8a7790-lager-reference.dtb \
sh73a0-kzm9g.dtb \
sh73a0-kzm9g-reference.dtb \
r8a73a4-ape6evm.dtb \
@ -241,7 +240,8 @@ dtb-$(CONFIG_ARCH_SHMOBILE_LEGACY) += emev2-kzm9d.dtb \
sh7372-mackerel.dtb
dtb-$(CONFIG_ARCH_SHMOBILE_MULTI) += emev2-kzm9d.dtb \
r7s72100-genmai-reference.dtb \
r8a7791-koelsch-reference.dtb
r8a7791-koelsch.dtb \
r8a7790-lager.dtb
dtb-$(CONFIG_ARCH_SOCFPGA) += socfpga_arria5_socdk.dtb \
socfpga_cyclone5_socdk.dtb \
socfpga_cyclone5_sockit.dtb \

35
arch/arm/mach-shmobile/Kconfig
View File

@ -12,6 +12,7 @@ config ARCH_SHMOBILE_MULTI
select HAVE_SMP
select ARM_GIC
select MIGHT_HAVE_CACHE_L2X0
select MIGHT_HAVE_PCI
select NO_IOPORT
select PINCTRL
select ARCH_REQUIRE_GPIOLIB
@ -27,6 +28,10 @@ config ARCH_EMEV2
config ARCH_R7S72100
bool "RZ/A1H (R7S72100)"
config ARCH_R8A7790
bool "R-Car H2 (R8A77900)"
select RENESAS_IRQC
config ARCH_R8A7791
bool "R-Car M2 (R8A77910)"
select RENESAS_IRQC
@ -46,6 +51,10 @@ config MACH_KZM9D
depends on ARCH_EMEV2
select REGULATOR_FIXED_VOLTAGE if REGULATOR
config MACH_LAGER
bool "Lager board"
depends on ARCH_R8A7790
comment "Renesas ARM SoCs System Configuration"
endif
@ -111,6 +120,7 @@ config ARCH_R8A7790
select ARCH_WANT_OPTIONAL_GPIOLIB
select ARM_GIC
select CPU_V7
select MIGHT_HAVE_PCI
select SH_CLK_CPG
select RENESAS_IRQC
@ -119,6 +129,7 @@ config ARCH_R8A7791
select ARCH_WANT_OPTIONAL_GPIOLIB
select ARM_GIC
select CPU_V7
select MIGHT_HAVE_PCI
select SH_CLK_CPG
select RENESAS_IRQC
@ -127,6 +138,7 @@ config ARCH_EMEV2
select ARCH_WANT_OPTIONAL_GPIOLIB
select ARM_GIC
select CPU_V7
select MIGHT_HAVE_PCI
select USE_OF
select AUTO_ZRELADDR
@ -250,32 +262,11 @@ config MACH_LAGER
depends on ARCH_R8A7790
select USE_OF
config MACH_LAGER_REFERENCE
bool "Lager board - Reference Device Tree Implementation"
depends on ARCH_R8A7790
select USE_OF
---help---
Use reference implementation of Lager board support
which makes use of device tree at the expense
of not supporting a number of devices.
This is intended to aid developers
config MACH_KOELSCH
bool "Koelsch board"
depends on ARCH_R8A7791
select USE_OF
config MACH_KOELSCH_REFERENCE
bool "Koelsch board - Reference Device Tree Implementation"
depends on ARCH_R8A7791
select USE_OF
---help---
Use reference implementation of Koelsch board support
which makes use of device tree at the expense
of not supporting a number of devices.
This is intended to aid developers
select MICREL_PHY if SH_ETH
config MACH_KZM9G
bool "KZM-A9-GT board"

3
arch/arm/mach-shmobile/Makefile
View File

@ -59,6 +59,7 @@ ifdef CONFIG_ARCH_SHMOBILE_MULTI
obj-$(CONFIG_MACH_GENMAI) += board-genmai-reference.o
obj-$(CONFIG_MACH_KOELSCH) += board-koelsch-reference.o
obj-$(CONFIG_MACH_KZM9D) += board-kzm9d-reference.o
obj-$(CONFIG_MACH_LAGER) += board-lager-reference.o
else
obj-$(CONFIG_MACH_APE6EVM) += board-ape6evm.o
obj-$(CONFIG_MACH_APE6EVM_REFERENCE) += board-ape6evm-reference.o
@ -70,11 +71,9 @@ obj-$(CONFIG_MACH_GENMAI_REFERENCE) += board-genmai-reference.o
obj-$(CONFIG_MACH_MARZEN) += board-marzen.o
obj-$(CONFIG_MACH_MARZEN_REFERENCE) += board-marzen-reference.o
obj-$(CONFIG_MACH_LAGER) += board-lager.o
obj-$(CONFIG_MACH_LAGER_REFERENCE) += board-lager-reference.o
obj-$(CONFIG_MACH_ARMADILLO800EVA) += board-armadillo800eva.o
obj-$(CONFIG_MACH_ARMADILLO800EVA_REFERENCE) += board-armadillo800eva-reference.o
obj-$(CONFIG_MACH_KOELSCH) += board-koelsch.o
obj-$(CONFIG_MACH_KOELSCH_REFERENCE) += board-koelsch-reference.o
obj-$(CONFIG_MACH_KZM9G) += board-kzm9g.o
obj-$(CONFIG_MACH_KZM9G_REFERENCE) += board-kzm9g-reference.o
endif

2
arch/arm/mach-shmobile/Makefile.boot
View File

@ -9,11 +9,9 @@ loadaddr-$(CONFIG_MACH_BOCKW_REFERENCE) += 0x60008000
loadaddr-$(CONFIG_MACH_GENMAI) += 0x08008000
loadaddr-$(CONFIG_MACH_GENMAI_REFERENCE) += 0x08008000
loadaddr-$(CONFIG_MACH_KOELSCH) += 0x40008000
loadaddr-$(CONFIG_MACH_KOELSCH_REFERENCE) += 0x40008000
loadaddr-$(CONFIG_MACH_KZM9G) += 0x41008000
loadaddr-$(CONFIG_MACH_KZM9G_REFERENCE) += 0x41008000
loadaddr-$(CONFIG_MACH_LAGER) += 0x40008000
loadaddr-$(CONFIG_MACH_LAGER_REFERENCE) += 0x40008000
loadaddr-$(CONFIG_MACH_MACKEREL) += 0x40008000
loadaddr-$(CONFIG_MACH_MARZEN) += 0x60008000
loadaddr-$(CONFIG_MACH_MARZEN_REFERENCE) += 0x60008000

5
arch/arm/mach-shmobile/board-armadillo800eva.c
View File

@ -423,7 +423,7 @@ static struct platform_pwm_backlight_data pwm_backlight_data = {
.max_brightness = 255,
.dft_brightness = 255,
.pwm_period_ns = 33333, /* 30kHz */
.enable_gpio = -1,
.enable_gpio = 61,
};
static struct platform_device pwm_backlight_device = {
@ -1203,9 +1203,6 @@ static void __init eva_init(void)
r8a7740_pinmux_init();
r8a7740_meram_workaround();
/* LCDC0 */
gpio_request_one(61, GPIOF_OUT_INIT_HIGH, NULL); /* LCDDON */
/* GETHER */
gpio_request_one(18, GPIOF_OUT_INIT_HIGH, NULL); /* PHY_RST */

1
arch/arm/mach-shmobile/board-bockw.c
View File

@ -25,6 +25,7 @@
#include <linux/mmc/sh_mmcif.h>
#include <linux/mtd/partitions.h>
#include <linux/pinctrl/machine.h>
#include <linux/platform_data/camera-rcar.h>
#include <linux/platform_data/usb-rcar-phy.h>
#include <linux/platform_device.h>
#include <linux/regulator/fixed.h>

30
arch/arm/mach-shmobile/board-koelsch-reference.c
View File

@ -19,7 +19,8 @@
* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
*/
#include <linux/clk-provider.h>
#include <linux/clk.h>
#include <linux/clkdev.h>
#include <linux/kernel.h>
#include <linux/of_platform.h>
#include <mach/common.h>
@ -30,7 +31,31 @@
static void __init koelsch_add_standard_devices(void)
{
#ifdef CONFIG_COMMON_CLK
of_clk_init(NULL);
/*
* This is a really crude hack to provide clkdev support to the SCIF
* and CMT devices until they get moved to DT.
*/
static const char * const scif_names[] = {
"scifa0", "scifa1", "scifb0", "scifb1", "scifb2", "scifa2",
"scif0", "scif1", "scif2", "scif3", "scif4", "scif5", "scifa3",
"scifa4", "scifa5",
};
struct clk *clk;
unsigned int i;
for (i = 0; i < ARRAY_SIZE(scif_names); ++i) {
clk = clk_get(NULL, scif_names[i]);
if (clk) {
clk_register_clkdev(clk, NULL, "sh-sci.%u", i);
clk_put(clk);
}
}
clk = clk_get(NULL, "cmt0");
if (clk) {
clk_register_clkdev(clk, NULL, "sh_cmt.0");
clk_put(clk);
}
#else
r8a7791_clock_init();
#endif
@ -39,6 +64,7 @@ static void __init koelsch_add_standard_devices(void)
}
static const char * const koelsch_boards_compat_dt[] __initconst = {
"renesas,koelsch",
"renesas,koelsch-reference",
NULL,
};

119
arch/arm/mach-shmobile/board-koelsch.c
View File

@ -19,20 +19,89 @@
* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
*/
#include <linux/dma-mapping.h>
#include <linux/gpio.h>
#include <linux/gpio_keys.h>
#include <linux/input.h>
#include <linux/kernel.h>
#include <linux/leds.h>
#include <linux/phy.h>
#include <linux/pinctrl/machine.h>
#include <linux/platform_data/gpio-rcar.h>
#include <linux/platform_data/rcar-du.h>
#include <linux/platform_device.h>
#include <linux/sh_eth.h>
#include <mach/common.h>
#include <mach/irqs.h>
#include <mach/r8a7791.h>
#include <mach/rcar-gen2.h>
#include <asm/mach-types.h>
#include <asm/mach/arch.h>
/* DU */
static struct rcar_du_encoder_data koelsch_du_encoders[] = {
{
.type = RCAR_DU_ENCODER_NONE,
.output = RCAR_DU_OUTPUT_LVDS0,
.connector.lvds.panel = {
.width_mm = 210,
.height_mm = 158,
.mode = {
.clock = 65000,
.hdisplay = 1024,
.hsync_start = 1048,
.hsync_end = 1184,
.htotal = 1344,
.vdisplay = 768,
.vsync_start = 771,
.vsync_end = 777,
.vtotal = 806,
.flags = 0,
},
},
},
};
static const struct rcar_du_platform_data koelsch_du_pdata __initconst = {
.encoders = koelsch_du_encoders,
.num_encoders = ARRAY_SIZE(koelsch_du_encoders),
};
static const struct resource du_resources[] __initconst = {
DEFINE_RES_MEM(0xfeb00000, 0x40000),
DEFINE_RES_MEM_NAMED(0xfeb90000, 0x1c, "lvds.0"),
DEFINE_RES_IRQ(gic_spi(256)),
DEFINE_RES_IRQ(gic_spi(268)),
};
static void __init koelsch_add_du_device(void)
{
struct platform_device_info info = {
.name = "rcar-du-r8a7791",
.id = -1,
.res = du_resources,
.num_res = ARRAY_SIZE(du_resources),
.data = &koelsch_du_pdata,
.size_data = sizeof(koelsch_du_pdata),
.dma_mask = DMA_BIT_MASK(32),
};
platform_device_register_full(&info);
}
/* Ether */
static const struct sh_eth_plat_data ether_pdata __initconst = {
.phy = 0x1,
.edmac_endian = EDMAC_LITTLE_ENDIAN,
.phy_interface = PHY_INTERFACE_MODE_RMII,
.ether_link_active_low = 1,
};
static const struct resource ether_resources[] __initconst = {
DEFINE_RES_MEM(0xee700000, 0x400),
DEFINE_RES_IRQ(gic_spi(162)),
};
/* LEDS */
static struct gpio_led koelsch_leds[] = {
{
@ -80,6 +149,22 @@ static const struct gpio_keys_platform_data koelsch_keys_pdata __initconst = {
};
static const struct pinctrl_map koelsch_pinctrl_map[] = {
/* DU */
PIN_MAP_MUX_GROUP_DEFAULT("rcar-du-r8a7791", "pfc-r8a7791",
"du_rgb666", "du"),
PIN_MAP_MUX_GROUP_DEFAULT("rcar-du-r8a7791", "pfc-r8a7791",
"du_sync", "du"),
PIN_MAP_MUX_GROUP_DEFAULT("rcar-du-r8a7791", "pfc-r8a7791",
"du_clk_out_0", "du"),
/* Ether */
PIN_MAP_MUX_GROUP_DEFAULT("r8a7791-ether", "pfc-r8a7791",
"eth_link", "eth"),
PIN_MAP_MUX_GROUP_DEFAULT("r8a7791-ether", "pfc-r8a7791",
"eth_mdio", "eth"),
PIN_MAP_MUX_GROUP_DEFAULT("r8a7791-ether", "pfc-r8a7791",
"eth_rmii", "eth"),
PIN_MAP_MUX_GROUP_DEFAULT("r8a7791-ether", "pfc-r8a7791",
"intc_irq0", "intc"),
/* SCIF0 (CN19: DEBUG SERIAL0) */
PIN_MAP_MUX_GROUP_DEFAULT("sh-sci.6", "pfc-r8a7791",
"scif0_data_d", "scif0"),
@ -95,12 +180,44 @@ static void __init koelsch_add_standard_devices(void)
ARRAY_SIZE(koelsch_pinctrl_map));
r8a7791_pinmux_init();
r8a7791_add_standard_devices();
platform_device_register_resndata(&platform_bus, "r8a7791-ether", -1,
ether_resources,
ARRAY_SIZE(ether_resources),
&ether_pdata, sizeof(ether_pdata));
platform_device_register_data(&platform_bus, "leds-gpio", -1,
&koelsch_leds_pdata,
sizeof(koelsch_leds_pdata));
platform_device_register_data(&platform_bus, "gpio-keys", -1,
&koelsch_keys_pdata,
sizeof(koelsch_keys_pdata));
koelsch_add_du_device();
}
/*
* Ether LEDs on the Koelsch board are named LINK and ACTIVE which corresponds
* to non-default 01 setting of the Micrel KSZ8041 PHY control register 1 bits
* 14-15. We have to set them back to 01 from the default 00 value each time
* the PHY is reset. It's also important because the PHY's LED0 signal is
* connected to SoC's ETH_LINK signal and in the PHY's default mode it will
* bounce on and off after each packet, which we apparently want to avoid.
*/
static int koelsch_ksz8041_fixup(struct phy_device *phydev)
{
u16 phyctrl1 = phy_read(phydev, 0x1e);
phyctrl1 &= ~0xc000;
phyctrl1 |= 0x4000;
return phy_write(phydev, 0x1e, phyctrl1);
}
static void __init koelsch_init(void)
{
koelsch_add_standard_devices();
if (IS_ENABLED(CONFIG_PHYLIB))
phy_register_fixup_for_id("r8a7791-ether-ff:01",
koelsch_ksz8041_fixup);
}
static const char * const koelsch_boards_compat_dt[] __initconst = {
@ -112,7 +229,7 @@ DT_MACHINE_START(KOELSCH_DT, "koelsch")
.smp = smp_ops(r8a7791_smp_ops),
.init_early = r8a7791_init_early,
.init_time = rcar_gen2_timer_init,
.init_machine = koelsch_add_standard_devices,
.init_machine = koelsch_init,
.init_late = shmobile_init_late,
.dt_compat = koelsch_boards_compat_dt,
MACHINE_END

32
arch/arm/mach-shmobile/board-lager-reference.c
View File

@ -18,6 +18,8 @@
* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
*/
#include <linux/clk.h>
#include <linux/clkdev.h>
#include <linux/init.h>
#include <linux/of_platform.h>
#include <mach/common.h>
@ -27,12 +29,42 @@
static void __init lager_add_standard_devices(void)
{
#ifdef CONFIG_COMMON_CLK
/*
* This is a really crude hack to provide clkdev support to the SCIF
* and CMT devices until they get moved to DT.
*/
static const char * const scif_names[] = {
"scifa0", "scifa1", "scifb0", "scifb1",
"scifb2", "scifa2", "scif0", "scif1",
"hscif0", "hscif1",
};
struct clk *clk;
unsigned int i;
for (i = 0; i < ARRAY_SIZE(scif_names); ++i) {
clk = clk_get(NULL, scif_names[i]);
if (clk) {
clk_register_clkdev(clk, NULL, "sh-sci.%u", i);
clk_put(clk);
}
}
clk = clk_get(NULL, "cmt0");
if (clk) {
clk_register_clkdev(clk, NULL, "sh_cmt.0");
clk_put(clk);
}
#else
r8a7790_clock_init();
#endif
r8a7790_add_dt_devices();
of_platform_populate(NULL, of_default_bus_match_table, NULL, NULL);
}
static const char *lager_boards_compat_dt[] __initdata = {
"renesas,lager",
"renesas,lager-reference",
NULL,
};

2
arch/arm/mach-shmobile/board-mackerel.c
View File

@ -1406,7 +1406,7 @@ static const struct pinctrl_map mackerel_pinctrl_map[] = {
/* USBHS1 */
PIN_MAP_MUX_GROUP_DEFAULT("renesas_usbhs.1", "pfc-sh7372",
"usb1_vbus", "usb1"),
PIN_MAP_CONFIGS_GROUP_DEFAULT("renesas_usbhs.&", "pfc-sh7372",
PIN_MAP_CONFIGS_GROUP_DEFAULT("renesas_usbhs.1", "pfc-sh7372",
"usb1_vbus", pin_pulldown_conf),
PIN_MAP_MUX_GROUP_DEFAULT("renesas_usbhs.1", "pfc-sh7372",
"usb1_otg_id_0", "usb1"),

1
arch/arm/mach-shmobile/clock-r7s72100.c
View File

@ -181,7 +181,6 @@ static struct clk_lookup lookups[] = {
CLKDEV_ICK_ID("sci_fck", "sh-sci.5", &mstp_clks[MSTP42]),
CLKDEV_ICK_ID("sci_fck", "sh-sci.6", &mstp_clks[MSTP41]),
CLKDEV_ICK_ID("sci_fck", "sh-sci.7", &mstp_clks[MSTP40]),
CLKDEV_CON_ID("mtu2_fck", &mstp_clks[MSTP33]),
};
void __init r7s72100_clock_init(void)

4
arch/arm/mach-shmobile/clock-r8a7790.c
View File

@ -292,9 +292,13 @@ static struct clk_lookup lookups[] = {
CLKDEV_DEV_ID("sh-sci.8", &mstp_clks[MSTP717]),
CLKDEV_DEV_ID("sh-sci.9", &mstp_clks[MSTP716]),
CLKDEV_DEV_ID("e6508000.i2c", &mstp_clks[MSTP931]),
CLKDEV_DEV_ID("i2c-rcar.0", &mstp_clks[MSTP931]),
CLKDEV_DEV_ID("e6518000.i2c", &mstp_clks[MSTP930]),
CLKDEV_DEV_ID("i2c-rcar.1", &mstp_clks[MSTP930]),
CLKDEV_DEV_ID("e6530000.i2c", &mstp_clks[MSTP929]),
CLKDEV_DEV_ID("i2c-rcar.2", &mstp_clks[MSTP929]),
CLKDEV_DEV_ID("e6540000.i2c", &mstp_clks[MSTP928]),
CLKDEV_DEV_ID("i2c-rcar.3", &mstp_clks[MSTP928]),
CLKDEV_DEV_ID("r8a7790-ether", &mstp_clks[MSTP813]),
CLKDEV_DEV_ID("e61f0000.thermal", &mstp_clks[MSTP522]),
CLKDEV_DEV_ID("rcar_thermal", &mstp_clks[MSTP522]),

3
arch/arm/mach-shmobile/clock-r8a7791.c
View File

@ -122,6 +122,7 @@ static struct clk *main_clks[] = {
/* MSTP */
enum {
MSTP813,
MSTP726, MSTP724, MSTP723, MSTP721, MSTP720,
MSTP719, MSTP718, MSTP715, MSTP714,
MSTP522,
@ -132,6 +133,7 @@ enum {
};
static struct clk mstp_clks[MSTP_NR] = {
[MSTP813] = SH_CLK_MSTP32(&p_clk, SMSTPCR8, 13, 0), /* Ether */
[MSTP726] = SH_CLK_MSTP32(&zx_clk, SMSTPCR7, 26, 0), /* LVDS0 */
[MSTP724] = SH_CLK_MSTP32(&zx_clk, SMSTPCR7, 24, 0), /* DU0 */
[MSTP723] = SH_CLK_MSTP32(&zx_clk, SMSTPCR7, 23, 0), /* DU1 */
@ -192,6 +194,7 @@ static struct clk_lookup lookups[] = {
CLKDEV_DEV_ID("sh_cmt.0", &mstp_clks[MSTP124]),
CLKDEV_DEV_ID("e61f0000.thermal", &mstp_clks[MSTP522]),
CLKDEV_DEV_ID("rcar_thermal", &mstp_clks[MSTP522]),
CLKDEV_DEV_ID("r8a7791-ether", &mstp_clks[MSTP813]), /* Ether */
};
#define R8A7791_CLOCK_ROOT(e, m, p0, p1, p30, p31) \

1
arch/arm/mach-shmobile/clock-sh73a0.c
View File

@ -652,6 +652,7 @@ static struct clk_lookup lookups[] = {
CLKDEV_DEV_ID("sh-sci.6", &mstp_clks[MSTP331]), /* SCIFA6 */
CLKDEV_DEV_ID("sh_cmt.10", &mstp_clks[MSTP329]), /* CMT10 */
CLKDEV_DEV_ID("sh_fsi2", &mstp_clks[MSTP328]), /* FSI */
CLKDEV_DEV_ID("ec230000.sound", &mstp_clks[MSTP328]), /* FSI */
CLKDEV_DEV_ID("sh_irda.0", &mstp_clks[MSTP325]), /* IrDA */
CLKDEV_DEV_ID("i2c-sh_mobile.1", &mstp_clks[MSTP323]), /* I2C1 */
CLKDEV_DEV_ID("e6822000.i2c", &mstp_clks[MSTP323]), /* I2C1 */

21
arch/arm/mach-shmobile/include/mach/r8a7778.h
View File

@ -20,13 +20,30 @@
#define __ASM_R8A7778_H__
#include <linux/sh_eth.h>
#include <linux/platform_data/camera-rcar.h>
/* HPB-DMA slave IDs */
enum {
HPBDMA_SLAVE_DUMMY,
HPBDMA_SLAVE_SDHI0_TX,
HPBDMA_SLAVE_SDHI0_RX,
HPBDMA_SLAVE_SSI0_TX,
HPBDMA_SLAVE_SSI0_RX,
HPBDMA_SLAVE_SSI1_TX,
HPBDMA_SLAVE_SSI1_RX,
HPBDMA_SLAVE_SSI2_TX,
HPBDMA_SLAVE_SSI2_RX,
HPBDMA_SLAVE_SSI3_TX,
HPBDMA_SLAVE_SSI3_RX,
HPBDMA_SLAVE_SSI4_TX,
HPBDMA_SLAVE_SSI4_RX,
HPBDMA_SLAVE_SSI5_TX,
HPBDMA_SLAVE_SSI5_RX,
HPBDMA_SLAVE_SSI6_TX,
HPBDMA_SLAVE_SSI6_RX,
HPBDMA_SLAVE_SSI7_TX,
HPBDMA_SLAVE_SSI7_RX,
HPBDMA_SLAVE_SSI8_TX,
HPBDMA_SLAVE_SSI8_RX,
HPBDMA_SLAVE_HPBIF0_TX,
HPBDMA_SLAVE_HPBIF0_RX,
HPBDMA_SLAVE_HPBIF1_TX,
@ -45,6 +62,8 @@ enum {
HPBDMA_SLAVE_HPBIF7_RX,
HPBDMA_SLAVE_HPBIF8_TX,
HPBDMA_SLAVE_HPBIF8_RX,
HPBDMA_SLAVE_USBFUNC_TX,
HPBDMA_SLAVE_USBFUNC_RX,
};
extern void r8a7778_add_standard_devices(void);

69
arch/arm/mach-shmobile/setup-r8a7778.c
View File

@ -319,6 +319,29 @@ void __init r8a7778_add_dt_devices(void)
#define HPB_DMAE_ASYNCMDR_ASMD21_SINGLE BIT(1) /* SDHI0 */
#define HPB_DMAE_ASYNCMDR_ASMD21_MULTI 0 /* SDHI0 */
#define HPBDMA_SSI(_id) \
{ \
.id = HPBDMA_SLAVE_SSI## _id ##_TX, \
.addr = 0xffd91008 + (_id * 0x40), \
.dcr = HPB_DMAE_DCR_CT | \
HPB_DMAE_DCR_DIP | \
HPB_DMAE_DCR_SPDS_32BIT | \
HPB_DMAE_DCR_DMDL | \
HPB_DMAE_DCR_DPDS_32BIT, \
.port = _id + (_id << 8), \
.dma_ch = (28 + _id), \
}, { \
.id = HPBDMA_SLAVE_SSI## _id ##_RX, \
.addr = 0xffd9100c + (_id * 0x40), \
.dcr = HPB_DMAE_DCR_CT | \
HPB_DMAE_DCR_DIP | \
HPB_DMAE_DCR_SMDL | \
HPB_DMAE_DCR_SPDS_32BIT | \
HPB_DMAE_DCR_DPDS_32BIT, \
.port = _id + (_id << 8), \
.dma_ch = (28 + _id), \
}
#define HPBDMA_HPBIF(_id) \
{ \
.id = HPBDMA_SLAVE_HPBIF## _id ##_TX, \
@ -371,8 +394,34 @@ static const struct hpb_dmae_slave_config hpb_dmae_slaves[] = {
.port = 0x0D0C,
.flags = HPB_DMAE_SET_ASYNC_RESET | HPB_DMAE_SET_ASYNC_MODE,
.dma_ch = 22,
}, {
.id = HPBDMA_SLAVE_USBFUNC_TX, /* for D0 */
.addr = 0xffe60018,
.dcr = HPB_DMAE_DCR_SPDS_32BIT |
HPB_DMAE_DCR_DMDL |
HPB_DMAE_DCR_DPDS_32BIT,
.port = 0x0000,
.dma_ch = 14,
}, {
.id = HPBDMA_SLAVE_USBFUNC_RX, /* for D1 */
.addr = 0xffe6001c,
.dcr = HPB_DMAE_DCR_SMDL |
HPB_DMAE_DCR_SPDS_32BIT |
HPB_DMAE_DCR_DPDS_32BIT,
.port = 0x0101,
.dma_ch = 15,
},
HPBDMA_SSI(0),
HPBDMA_SSI(1),
HPBDMA_SSI(2),
HPBDMA_SSI(3),
HPBDMA_SSI(4),
HPBDMA_SSI(5),
HPBDMA_SSI(6),
HPBDMA_SSI(7),
HPBDMA_SSI(8),
HPBDMA_HPBIF(0),
HPBDMA_HPBIF(1),
HPBDMA_HPBIF(2),
@ -385,24 +434,44 @@ static const struct hpb_dmae_slave_config hpb_dmae_slaves[] = {
};
static const struct hpb_dmae_channel hpb_dmae_channels[] = {
HPB_DMAE_CHANNEL(0x7c, HPBDMA_SLAVE_USBFUNC_TX), /* ch. 14 */
HPB_DMAE_CHANNEL(0x7c, HPBDMA_SLAVE_USBFUNC_RX), /* ch. 15 */
HPB_DMAE_CHANNEL(0x7e, HPBDMA_SLAVE_SDHI0_TX), /* ch. 21 */
HPB_DMAE_CHANNEL(0x7e, HPBDMA_SLAVE_SDHI0_RX), /* ch. 22 */
HPB_DMAE_CHANNEL(0x7f, HPBDMA_SLAVE_SSI0_TX), /* ch. 28 */
HPB_DMAE_CHANNEL(0x7f, HPBDMA_SLAVE_SSI0_RX), /* ch. 28 */
HPB_DMAE_CHANNEL(0x7f, HPBDMA_SLAVE_HPBIF0_TX), /* ch. 28 */
HPB_DMAE_CHANNEL(0x7f, HPBDMA_SLAVE_HPBIF0_RX), /* ch. 28 */
HPB_DMAE_CHANNEL(0x7f, HPBDMA_SLAVE_SSI1_TX), /* ch. 29 */
HPB_DMAE_CHANNEL(0x7f, HPBDMA_SLAVE_SSI1_RX), /* ch. 29 */
HPB_DMAE_CHANNEL(0x7f, HPBDMA_SLAVE_HPBIF1_TX), /* ch. 29 */
HPB_DMAE_CHANNEL(0x7f, HPBDMA_SLAVE_HPBIF1_RX), /* ch. 29 */
HPB_DMAE_CHANNEL(0x7f, HPBDMA_SLAVE_SSI2_TX), /* ch. 30 */
HPB_DMAE_CHANNEL(0x7f, HPBDMA_SLAVE_SSI2_RX), /* ch. 30 */
HPB_DMAE_CHANNEL(0x7f, HPBDMA_SLAVE_HPBIF2_TX), /* ch. 30 */
HPB_DMAE_CHANNEL(0x7f, HPBDMA_SLAVE_HPBIF2_RX), /* ch. 30 */
HPB_DMAE_CHANNEL(0x7f, HPBDMA_SLAVE_SSI3_TX), /* ch. 31 */
HPB_DMAE_CHANNEL(0x7f, HPBDMA_SLAVE_SSI3_RX), /* ch. 31 */
HPB_DMAE_CHANNEL(0x7f, HPBDMA_SLAVE_HPBIF3_TX), /* ch. 31 */
HPB_DMAE_CHANNEL(0x7f, HPBDMA_SLAVE_HPBIF3_RX), /* ch. 31 */
HPB_DMAE_CHANNEL(0x7f, HPBDMA_SLAVE_SSI4_TX), /* ch. 32 */
HPB_DMAE_CHANNEL(0x7f, HPBDMA_SLAVE_SSI4_RX), /* ch. 32 */
HPB_DMAE_CHANNEL(0x7f, HPBDMA_SLAVE_HPBIF4_TX), /* ch. 32 */
HPB_DMAE_CHANNEL(0x7f, HPBDMA_SLAVE_HPBIF4_RX), /* ch. 32 */
HPB_DMAE_CHANNEL(0x7f, HPBDMA_SLAVE_SSI5_TX), /* ch. 33 */
HPB_DMAE_CHANNEL(0x7f, HPBDMA_SLAVE_SSI5_RX), /* ch. 33 */
HPB_DMAE_CHANNEL(0x7f, HPBDMA_SLAVE_HPBIF5_TX), /* ch. 33 */
HPB_DMAE_CHANNEL(0x7f, HPBDMA_SLAVE_HPBIF5_RX), /* ch. 33 */
HPB_DMAE_CHANNEL(0x7f, HPBDMA_SLAVE_SSI6_TX), /* ch. 34 */
HPB_DMAE_CHANNEL(0x7f, HPBDMA_SLAVE_SSI6_RX), /* ch. 34 */
HPB_DMAE_CHANNEL(0x7f, HPBDMA_SLAVE_HPBIF6_TX), /* ch. 34 */
HPB_DMAE_CHANNEL(0x7f, HPBDMA_SLAVE_HPBIF6_RX), /* ch. 34 */
HPB_DMAE_CHANNEL(0x7f, HPBDMA_SLAVE_SSI7_TX), /* ch. 35 */
HPB_DMAE_CHANNEL(0x7f, HPBDMA_SLAVE_SSI7_RX), /* ch. 35 */
HPB_DMAE_CHANNEL(0x7f, HPBDMA_SLAVE_HPBIF7_TX), /* ch. 35 */
HPB_DMAE_CHANNEL(0x7f, HPBDMA_SLAVE_HPBIF7_RX), /* ch. 35 */
HPB_DMAE_CHANNEL(0x7f, HPBDMA_SLAVE_SSI8_TX), /* ch. 36 */
HPB_DMAE_CHANNEL(0x7f, HPBDMA_SLAVE_SSI8_RX), /* ch. 36 */
HPB_DMAE_CHANNEL(0x7f, HPBDMA_SLAVE_HPBIF8_TX), /* ch. 36 */
HPB_DMAE_CHANNEL(0x7f, HPBDMA_SLAVE_HPBIF8_RX), /* ch. 36 */
};

25
arch/arm/mach-shmobile/setup-r8a7790.c
View File

@ -67,6 +67,27 @@ R8A7790_GPIO(5);
&r8a7790_gpio##idx##_platform_data, \
sizeof(r8a7790_gpio##idx##_platform_data))
static struct resource i2c_resources[] __initdata = {
/* I2C0 */
DEFINE_RES_MEM(0xE6508000, 0x40),
DEFINE_RES_IRQ(gic_spi(287)),
/* I2C1 */
DEFINE_RES_MEM(0xE6518000, 0x40),
DEFINE_RES_IRQ(gic_spi(288)),
/* I2C2 */
DEFINE_RES_MEM(0xE6530000, 0x40),
DEFINE_RES_IRQ(gic_spi(286)),
/* I2C3 */
DEFINE_RES_MEM(0xE6540000, 0x40),
DEFINE_RES_IRQ(gic_spi(290)),
};
#define r8a7790_register_i2c(idx) \
platform_device_register_simple( \
"i2c-rcar", idx, \
i2c_resources + (2 * idx), 2); \
void __init r8a7790_pinmux_init(void)
{
r8a7790_register_pfc();
@ -76,6 +97,10 @@ void __init r8a7790_pinmux_init(void)
r8a7790_register_gpio(3);
r8a7790_register_gpio(4);
r8a7790_register_gpio(5);
r8a7790_register_i2c(0);
r8a7790_register_i2c(1);
r8a7790_register_i2c(2);
r8a7790_register_i2c(3);
}
#define SCIF_COMMON(scif_type, baseaddr, irq) \

29
arch/arm/mach-shmobile/setup-rcar-gen2.c
View File

@ -18,6 +18,7 @@
* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
*/
#include <linux/clk/shmobile.h>
#include <linux/clocksource.h>
#include <linux/io.h>
#include <linux/kernel.h>
@ -44,8 +45,10 @@ u32 __init rcar_gen2_read_mode_pins(void)
void __init rcar_gen2_timer_init(void)
{
#ifdef CONFIG_ARM_ARCH_TIMER
#if defined(CONFIG_ARM_ARCH_TIMER) || defined(CONFIG_COMMON_CLK)
u32 mode = rcar_gen2_read_mode_pins();
#endif
#ifdef CONFIG_ARM_ARCH_TIMER
void __iomem *base;
int extal_mhz = 0;
u32 freq;
@ -78,14 +81,28 @@ void __init rcar_gen2_timer_init(void)
/* Remap "armgcnt address map" space */
base = ioremap(0xe6080000, PAGE_SIZE);
/* Update registers with correct frequency */
iowrite32(freq, base + CNTFID0);
asm volatile("mcr p15, 0, %0, c14, c0, 0" : : "r" (freq));
/*
* Update the timer if it is either not running, or is not at the
* right frequency. The timer is only configurable in secure mode
* so this avoids an abort if the loader started the timer and
* entered the kernel in non-secure mode.
*/
if ((ioread32(base + CNTCR) & 1) == 0 ||
ioread32(base + CNTFID0) != freq) {
/* Update registers with correct frequency */
iowrite32(freq, base + CNTFID0);
asm volatile("mcr p15, 0, %0, c14, c0, 0" : : "r" (freq));
/* make sure arch timer is started by setting bit 0 of CNTCR */
iowrite32(1, base + CNTCR);
}
/* make sure arch timer is started by setting bit 0 of CNTCR */
iowrite32(1, base + CNTCR);
iounmap(base);
#endif /* CONFIG_ARM_ARCH_TIMER */
#ifdef CONFIG_COMMON_CLK
rcar_gen2_clocks_init(mode);
#endif
clocksource_of_init();
}

100
include/dt-bindings/clock/r8a7790-clock.h Normal file
View File

@ -0,0 +1,100 @@
/*
* Copyright 2013 Ideas On Board SPRL
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*/
#ifndef __DT_BINDINGS_CLOCK_R8A7790_H__
#define __DT_BINDINGS_CLOCK_R8A7790_H__
/* CPG */
#define R8A7790_CLK_MAIN 0
#define R8A7790_CLK_PLL0 1
#define R8A7790_CLK_PLL1 2
#define R8A7790_CLK_PLL3 3
#define R8A7790_CLK_LB 4
#define R8A7790_CLK_QSPI 5
#define R8A7790_CLK_SDH 6
#define R8A7790_CLK_SD0 7
#define R8A7790_CLK_SD1 8
#define R8A7790_CLK_Z 9
/* MSTP1 */
#define R8A7790_CLK_TMU1 11
#define R8A7790_CLK_TMU3 21
#define R8A7790_CLK_TMU2 22
#define R8A7790_CLK_CMT0 24
#define R8A7790_CLK_TMU0 25
#define R8A7790_CLK_VSP1_DU1 27
#define R8A7790_CLK_VSP1_DU0 28
#define R8A7790_CLK_VSP1_RT 30
#define R8A7790_CLK_VSP1_SY 31
/* MSTP2 */
#define R8A7790_CLK_SCIFA2 2
#define R8A7790_CLK_SCIFA1 3
#define R8A7790_CLK_SCIFA0 4
#define R8A7790_CLK_SCIFB0 6
#define R8A7790_CLK_SCIFB1 7
#define R8A7790_CLK_SCIFB2 16
#define R8A7790_CLK_SYS_DMAC0 18
#define R8A7790_CLK_SYS_DMAC1 19
/* MSTP3 */
#define R8A7790_CLK_TPU0 4
#define R8A7790_CLK_MMCIF1 5
#define R8A7790_CLK_SDHI3 11
#define R8A7790_CLK_SDHI2 12
#define R8A7790_CLK_SDHI1 13
#define R8A7790_CLK_SDHI0 14
#define R8A7790_CLK_MMCIF0 15
#define R8A7790_CLK_SSUSB 28
#define R8A7790_CLK_CMT1 29
#define R8A7790_CLK_USBDMAC0 30
#define R8A7790_CLK_USBDMAC1 31
/* MSTP5 */
#define R8A7790_CLK_THERMAL 22
#define R8A7790_CLK_PWM 23
/* MSTP7 */
#define R8A7790_CLK_EHCI 3
#define R8A7790_CLK_HSUSB 4
#define R8A7790_CLK_HSCIF1 16
#define R8A7790_CLK_HSCIF0 17
#define R8A7790_CLK_SCIF1 20
#define R8A7790_CLK_SCIF0 21
#define R8A7790_CLK_DU2 22
#define R8A7790_CLK_DU1 23
#define R8A7790_CLK_DU0 24
#define R8A7790_CLK_LVDS1 25
#define R8A7790_CLK_LVDS0 26
/* MSTP8 */
#define R8A7790_CLK_VIN3 8
#define R8A7790_CLK_VIN2 9
#define R8A7790_CLK_VIN1 10
#define R8A7790_CLK_VIN0 11
#define R8A7790_CLK_ETHER 13
#define R8A7790_CLK_SATA1 14
#define R8A7790_CLK_SATA0 15
/* MSTP9 */
#define R8A7790_CLK_GPIO5 7
#define R8A7790_CLK_GPIO4 8
#define R8A7790_CLK_GPIO3 9
#define R8A7790_CLK_GPIO2 10
#define R8A7790_CLK_GPIO1 11
#define R8A7790_CLK_GPIO0 12
#define R8A7790_CLK_RCAN1 15
#define R8A7790_CLK_RCAN0 16
#define R8A7790_CLK_IICDVFS 26
#define R8A7790_CLK_I2C3 28
#define R8A7790_CLK_I2C2 29
#define R8A7790_CLK_I2C1 30
#define R8A7790_CLK_I2C0 31
#endif /* __DT_BINDINGS_CLOCK_R8A7790_H__ */

105
include/dt-bindings/clock/r8a7791-clock.h Normal file
View File

@ -0,0 +1,105 @@
/*
* Copyright 2013 Ideas On Board SPRL
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*/
#ifndef __DT_BINDINGS_CLOCK_R8A7791_H__
#define __DT_BINDINGS_CLOCK_R8A7791_H__
/* CPG */
#define R8A7791_CLK_MAIN 0
#define R8A7791_CLK_PLL0 1
#define R8A7791_CLK_PLL1 2
#define R8A7791_CLK_PLL3 3
#define R8A7791_CLK_LB 4
#define R8A7791_CLK_QSPI 5
#define R8A7791_CLK_SDH 6
#define R8A7791_CLK_SD0 7
#define R8A7791_CLK_Z 8
/* MSTP1 */
#define R8A7791_CLK_TMU1 11
#define R8A7791_CLK_TMU3 21
#define R8A7791_CLK_TMU2 22
#define R8A7791_CLK_CMT0 24
#define R8A7791_CLK_TMU0 25
#define R8A7791_CLK_VSP1_DU1 27
#define R8A7791_CLK_VSP1_DU0 28
#define R8A7791_CLK_VSP1_SY 31
/* MSTP2 */
#define R8A7791_CLK_SCIFA2 2
#define R8A7791_CLK_SCIFA1 3
#define R8A7791_CLK_SCIFA0 4
#define R8A7791_CLK_SCIFB0 6
#define R8A7791_CLK_SCIFB1 7
#define R8A7791_CLK_SCIFB2 16
#define R8A7791_CLK_DMAC 18
/* MSTP3 */
#define R8A7791_CLK_TPU0 4
#define R8A7791_CLK_SDHI2 11
#define R8A7791_CLK_SDHI1 12
#define R8A7791_CLK_SDHI0 14
#define R8A7791_CLK_MMCIF0 15
#define R8A7791_CLK_SSUSB 28
#define R8A7791_CLK_CMT1 29
#define R8A7791_CLK_USBDMAC0 30
#define R8A7791_CLK_USBDMAC1 31
/* MSTP5 */
#define R8A7791_CLK_THERMAL 22
#define R8A7791_CLK_PWM 23
/* MSTP7 */
#define R8A7791_CLK_HSUSB 4
#define R8A7791_CLK_HSCIF2 13
#define R8A7791_CLK_SCIF5 14
#define R8A7791_CLK_SCIF4 15
#define R8A7791_CLK_HSCIF1 16
#define R8A7791_CLK_HSCIF0 17
#define R8A7791_CLK_SCIF3 18
#define R8A7791_CLK_SCIF2 19
#define R8A7791_CLK_SCIF1 20
#define R8A7791_CLK_SCIF0 21
#define R8A7791_CLK_DU1 23
#define R8A7791_CLK_DU0 24
#define R8A7791_CLK_LVDS0 26
/* MSTP8 */
#define R8A7791_CLK_VIN2 9
#define R8A7791_CLK_VIN1 10
#define R8A7791_CLK_VIN0 11
#define R8A7791_CLK_ETHER 13
#define R8A7791_CLK_SATA1 14
#define R8A7791_CLK_SATA0 15
/* MSTP9 */
#define R8A7791_CLK_GPIO7 4
#define R8A7791_CLK_GPIO6 5
#define R8A7791_CLK_GPIO5 7
#define R8A7791_CLK_GPIO4 8
#define R8A7791_CLK_GPIO3 9
#define R8A7791_CLK_GPIO2 10
#define R8A7791_CLK_GPIO1 11
#define R8A7791_CLK_GPIO0 12
#define R8A7791_CLK_RCAN1 15
#define R8A7791_CLK_RCAN0 16
#define R8A7791_CLK_I2C5 25
#define R8A7791_CLK_IICDVFS 26
#define R8A7791_CLK_I2C4 27
#define R8A7791_CLK_I2C3 28
#define R8A7791_CLK_I2C2 29
#define R8A7791_CLK_I2C1 30
#define R8A7791_CLK_I2C0 31
/* MSTP11 */
#define R8A7791_CLK_SCIFA3 6
#define R8A7791_CLK_SCIFA4 7
#define R8A7791_CLK_SCIFA5 8
#endif /* __DT_BINDINGS_CLOCK_R8A7791_H__ */